CY8C4146LQI-S433
The CY8C4146LQI-S433 is an electronic component. View the full CY8C4146LQI-S433 datasheet below including absolute maximum ratings.
Overview
Part: PSoC™ 4100S Plus — Infineon
Type: Programmable Embedded System Controller (MCU)
Description: AEC-Q100 compliant 32-bit Arm® Cortex®-M0+ CPU based programmable embedded system controller with up to 128 KB Flash, 16 KB SRAM, capacitive touch-sensing, and flexible analog/digital blocks, operating from 1.71 V to 5.5 V.
Operating Conditions:
- Supply voltage: 1.71 V to 5.5 V
- Operating temperature: -40 to +125 °C
- Max CPU clock: 48 MHz
Absolute Maximum Ratings:
Key Specs:
- CPU: 32-bit Arm® Cortex®-M0+ at 48 MHz
- Flash memory: Up to 128 KB
- SRAM: Up to 16 KB
- SAR ADC: 12-bit, 1-Msps, differential and single-ended modes
- Serial Communication Blocks (SCBs): Five, reconfigurable for I2C, SPI, UART, or LIN slave
- Timer/Counter/PWM (TCPWM) blocks: Eight 16-bit
- GPIO pins: Up to 54 programmable
- Deep Sleep digital system current: 2.5 µA
Features:
- Automotive Electronics Council (AEC) AEC-Q100 Qualified
- Capacitive touch-sensing (CAPSENSE™) with SmartSense and CSD
- Programmable analog: Two opamps, two current DACs (IDACs), two low-power comparators
- Programmable digital: Logic blocks
- CAN 2.0B block with support for time-triggered CAN (TTCAN)
- True random number generator (TRNG)
- LCD segment drive capability
- PSoC™ Creator design environment
Package:
- 40-pin QFN
- 64-pin QFN
- 64-pin TQFP
Features
- Automotive Electronics Council (AEC) AEC-Q100 Qualified
- 32-bit MCU subsystem
- 48-MHz Arm® Cortex®-M0+ CPU
- -Up to 128 KB of flash with Read Accelerator
- Up to 16 KB of SRAM
- 8-channel DMA engine
- Programmable analog
- Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and comparator modes and ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode.
- 12-bit 1-Msps SAR ADC with differential and single-ended modes, and channel sequencer with signal averaging
- Single-slope 10-bit ADC function provided by a capacitance sensing block
- Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin
- Two low-power comparators that operate in Deep Sleep low-power mode
- Programmable digital
- Programmable logic blocks allowing Boolean operations to be performed on port inputs and outputs
- Low-power 1.71 V to 5.5 V operation
- Deep Sleep mode with operational analog and 2.5 A digital system current
- Capacitive sensing
- -Capacitive sigma-delta (CSD) provides best-in-class signal-to-noise ratio (SNR) (> 5:1) and water tolerance
- Infineon-supplied software component makes capacitive sensing design easy
- Automatic hardware tuning (SmartSense)
- LCD drive capability
- LCD segment drive capability on GPIOs
- Serial communication
- Five independent run-time reconfigurable serial communication blocks (SCBs) with re-configurable I 2 C, SPI, UART functionality, or LIN slave functionality
- Timing and pulse-width modulation
- Eight 16-bit timer/counter/pulse-width modulator (TCPWM) blocks
- Center-aligned, Edge, and Pseudo-random modes
- -Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications
- Quadrature decoder
Features
- Clock sources
- -4 to 33 MHz external crystal oscillator (ECO)
- PLL to generate 48-MHz frequency
- 32-kHz watch crystal oscillator (WCO)
- ±2% internal main oscillator (IMO)
- -32-kHz internal low-power oscillator (ILO)
- True random number generator (TRNG)
- TRNG generates truly random number for secure key generation for cryptography applications
- CAN block
- CAN 2.0B block with support for time-triggered CAN (TTCAN)
- Temperature range
- Grade-A: -40°C to +85°C
- Grade-S: -40°C to +105°C
- Grade-E: -40°C to +125°C
- Up to 54 programmable GPIO pins
- 40-pin QFN, 64-pin QFN, and 64-pin TQFP packages
- Any GPIO pin can be CAPSENSE™, analog, or digital
- Drive modes, strengths, and slew rates are programmable
- PSoC™ Creator design environment
- Integrated development environment (IDE) provides schematic design entry and build (with analog and digital automatic routing)
- Applications programming interface (API) component for all fixed-function and programmable peripherals
- Industry-standard tool compatibility
- After schematic entry, development can be done with Arm®-based industry-standard development tools
More information
Pin Configuration
Each port pin has can be assigned to one of multiple functions; it can, for example, be an analog I/O, a digital peripheral function, an LCD pin, or a CAPSENSE™ pin. The pin assignments are shown in the following table.
Absolute Maximum Ratings
Table 4 Absolute maximum ratings [1]
| Spec ID# | Parameter | Description | Min | Typ | Max | Unit | Details/ conditions |
|---|---|---|---|---|---|---|---|
| SID1 | V DDD_ABS | Digital supply relative to V SS | -0.5 | - | 6 | V | - |
| SID2 | V CCD_ABS | Direct digital core voltage input relative to V SS | -0.5 | - | 1.95 | - | |
| SID3 | V GPIO_ABS | GPIO voltage | -0.5 | - | V DD + 0.5 | - | |
| SID4 | I GPIO_ABS | Maximum current per GPIO | -25 | - | 25 | mA | - |
| SID5 | I GPIO_in- jection | GPIO injection current, Max for V IH > V DDD , and Min for V IL < V SS | -0.5 | - | 0.5 | Current injected per pin | |
| BID44 | ESD_HBM | Electrostatic discharge human body model | 2200 | - | - | V | - |
| BID45 | ESD_CDM | Electrostatic discharge charged device model | 500 | - | - | - | |
| BID46 | LU | Pin current for latch-up | -140 | - | 140 | mA | - |
- Usage above the absolute maximum conditions listed in Table 4 may cause permanent damage to the device. Exposure to Absolute Maximum conditions for extended periods of time may affect device reliability. The Maximum Storage Temperature is 150°C in compliance with JEDEC Standard JESD22-A103, High Temperature Storage Life. When used below Absolute Maximum conditions but above normal operating conditions, the device may not operate to specification.
Electrical specifications
Thermal Information
| Parameter | Description | Package | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|---|
| T A | Operating ambient temperature | - | For A-grade devices | -40 | 25 | 85 | °C |
| T A | Operating ambient temperature | - | For S-grade devices | -40 | 25 | 105 | °C |
| T A | Operating ambient temperature | - | For E-grade devices | -40 | 25 | 125 | °C |
| T J | Operating junction temperature | - | For A-grade devices | -40 | - | 100 | °C |
| T J | Operating junction temperature | - | For S-grade devices | -40 | - | 115 | °C |
| T J | Operating junction temperature | - | For E-grade devices | -40 | - | 140 | °C |
| T JA | Package θ JA | 64-pin TQFP | - | - | 46 | - | °C/W |
| T JA | Package θ JA | 40-pin QFN | - | - | 25 | - | °C/W |
| T JA | Package θ JA | 64-pin QFN | - | 17 | °C/W | ||
| T JC | Package θ JC | 64-pin TQFP | - | - | 10 | - | °C/W |
| T JC | Package θ JC | 40-pin QFN | - | - | 3 | - | °C/W |
| T JC | Package θ JC | 64-pin QFN | - | - | 6 | - | °C/W |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| CY8C4146AZI-S455 | now Infineon | — |
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