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CH572D

RISC-V MCU with Integrated 2.4G Wireless Communication

The CH572D is a risc-v mcu with integrated 2.4g wireless communication from WCH (WCH.CN). View the full CH572D datasheet below including key specifications, pinout.

Manufacturer

WCH (WCH.CN)

Category

RISC-V MCU with Integrated 2.4G Wireless Communication

Package

TSSOP16, QFN20, DFN10X3, SOP8

Key Specifications

ParameterValue
CoreQingke 32-bit RISC-V3C Core
Gpio Pins12
Sram Memory12KB
Flash Memory256KB
Usb StandardFull-Speed USB 2.0
I2c Interfaces1
Spi Interfaces1
Uart Interfaces1
Halt Mode Current420μA to 1.3mA
Idle Mode Current1.7mA
Rf Transmit Power+7.5dBm
Wireless Standard2.4GHz, Bluetooth Low Energy 5.0
Max Core Frequency100MHz
Sleep Mode Current0.46μA to 1.2μA
Bluetooth Data Rate1Mbps, 2Mbps
Supply Voltage Range2.0V to 3.6V or 4.5V to 5.3V
Shutdown Mode Current0.3μA to 0.9μA
Key Detection Channels20
Rf Receive Sensitivity-95dBm

Overview

Part: CH572 — WCH (WCH.CN)

Type: RISC-V MCU with Integrated 2.4G Wireless Communication

Description: The CH572 is a RISC-V MCU microcontroller with integrated 2.4G wireless communication, featuring a 2Mbps low-power Bluetooth BLE 5.0 module, USB Full-Speed controller, and rich peripheral resources, suitable for low pin count 2.4G and simple Bluetooth applications.

Operating Conditions:

  • Supply voltage: 2.0–3.6V or 4.5–5.3V (model dependent)

Absolute Maximum Ratings:

Key Specs:

  • Core: Qingke 32-bit RISC-V3C Core
  • Max system clock frequency: 100MHz
  • FlashROM: 256KB (240KB User CodeFlash, 8KB BootLoader, 8KB InfoFlash)
  • SRAM: 12KB (Sleep retention storage)
  • Bluetooth BLE: Complies with Bluetooth Low Energy 5.0, supports 2Mbps and 1Mbps
  • RF Receive sensitivity: -95dBm
  • RF Transmit power: Programmable +7.5dBm
  • USB: Full/Low-speed Host and Device modes, 15 endpoints
  • Low Power Modes: Sleep Mode 0.46μA1.2μA, Shutdown Mode 0.3μA0.9μA

Features:

  • Supports RV32IMBC instruction set and self-extended instructions
  • Built-in 5V to 3.3V voltage regulator LDO5V
  • AES-128 encryption/decryption, Chip Unique ID
  • Real-time Clock RTC
  • Key Detection Module: Supports 20 key detections
  • Analog Voltage Comparator CMP: Built-in 16 levels of reference voltage
  • Timers: 1x 26-bit timer, 1x 26-bit PWM, 5x 16-bit PWM
  • Watchdog Timers: Independent and Window type
  • Asynchronous Serial Port UART: 1 independent UART, compatible with 16C550
  • Serial Peripheral Interface SPI: Supports Master and Slave modes
  • Two-wire Serial Interface I2C: Supports Master and Slave modes
  • General Purpose Input/Output Port GPIO: 12 GPIOs, 1 supports 5V input
  • Single/Dual-wire Emulation Debug Interface

Applications:

  • 2.4G wireless communication applications
  • Simple Bluetooth applications

Package:

  • QFN20
  • DFN10X3
  • TSSOP16
  • SOP8

Features

  • Compatible with 16C550 asynchronous serial port with enhancements.
  • Supports 5, 6, 7, or 8 data bits and 1 or 2 stop bits.
  • Supports odd, even, no parity, space 0, mark 1, and other parity methods.
  • Programmable communication baud rate, up to 12.5Mbps.
  • Built-in 8-byte FIFO (First-In, First-Out) buffer, supporting 4 FIFO trigger levels.
  • Supports serial frame error detection, supports Break line interval detection.
  • Supports full-duplex serial communication.

Pin Configuration

PinNameTypeDescription
1PA3I/O/APA3: 通用双向数字 I/O 引脚。CMP_PO: 比较器的输入正端。TXD: UART 串行数据输出。SCL_2: I2C 串行时钟引脚映射。SCK: SPI 的 SCK 引脚映射。PWM3: 脉宽调制输出通道3。RXD_1: UART 的 RXD 引脚映射。KEYSCAN1: 按键扫描输入1。 (alt: CMP_PO, TXD, SCL_2, SCK, PWM3, RXD_1, KEYSCAN1)
2X0O/A高频振荡器 HSE 的反相输出端, 外接 32MHz 晶体的一端。
3XIA高频振荡器 HSE 的输入端, 外接 32MHz 晶体的另一端。
4NC.NC.空脚。
5ANTARF 射频信号输入输出, 建议直连天线。
6VDD33P模拟电源输入, 需贴近引脚外接 2.2uF 并联 0.1uF 电容。如果是一单 3.3V 电源供电, 则 VDD33 引脚输入额定 3.3V 电源, V5 引脚悬空或与 VDD33 引脚短接。
7VIO33PI/O 电源输入, 需要与 VDD33 引脚短接。
8V5P当单一 5V 电源供电时, V5 引脚输入额定 5V 电源, 为内部 LDO5V 供电, 由 LDO5V 在 VDD33 引脚产生 3.3V, 需贴近引脚外接 2.2uF 电容, 并需在 V5 与 VDD33 引脚之间串接额定 1.5KΩ 电阻。当单一 3.3V 电源供电时, V5 引脚悬空或与 VDD33 引脚短接。
9PA9I/0/5VTPA9: 通用双向数字 I/O 引脚。SDA: I2C 串行数据引脚, 开漏输出和输入。TMR_3: 定时器的 TMR 引脚映射。RXD_5: UART 的 RXD 引脚映射。CAP_IN1_3: 定时器的捕获输入通道 1 的映射。CAP_IN2_2: 定时器的捕获输入通道 2 的映射。 (alt: SDA, TMR_3, RXD_5, CAP_IN1_3, CAP_IN2_2)
10PA8I/OPA8: 通用双向数字 I/O 引脚。TXD_5: UART 的 TXD 引脚映射。SCL: I2C 串行时钟引脚, 主机输出和输入/从机输入。PWM5: 脉宽调制输出通道 5。RST: 外部复位输入, 低电平有效, 内置上拉电阻。KEYSCAN2: 按键扫描输入 2。 (alt: TXD_5, SCL, PWM5, RST, KEYSCAN2)
11PA0I/O/A通用双向数字 I/O 引脚。 (alt: UDM, SWDIO, TXD_3, SCL_1, RXD_2)
12PA1I/O/A通用双向数字 I/O 引脚。 (alt: UDP, SWCLK, TXD_2, SDA_1, RXD_3)
13PA4I/O通用双向数字 I/O 引脚。 (alt: X25MO, PWM4, TMR_2, SCS, CAP_IN1_2, CAP_IN2_3)
14PA5I/O通用双向数字 I/O 引脚。 (alt: SCL_3, SCK)
15PA6I/O通用双向数字 I/O 引脚。 (alt: SDA_3, MISO, RXD_4)
16PA7I/O/A通用双向数字 I/O 引脚。 (alt: CMP_P1, TXD_4, MOSI, PWM1, TMR, RST, CAP_IN1, CAP_IN2_1)
17PA10I/O通用双向数字 I/O 引脚。 (alt: RXD_6, TXD_7, KEYSCAN3)
18PA11I/O通用双向数字 I/O 引脚。 (alt: TXD_6, RXD_7, KEYSCAN4)
19NC.NC.空脚。
20PA2I/O/A通用双向数字 I/O 引脚。 (alt: CMP_N, TXD_1, SDA_2, PWM2, TMR_1, RXD, SCS_, KEYSCANO, CAP_IN1_1, CAP_IN2)

Ordering Information

Chip ModelPackage Type
CH572D
CH572Q
CH572RTSSOP16
CH570DQFN20
CH570QDFN10X3
CH570ESOP8

Related Variants

The following components are covered by the same datasheet.

Part NumberManufacturerPackage
CH570DWCH (WCH.CN)QFN20
CH570EWCH (WCH.CN)SOP8
CH570QWCH (WCH.CN)DFN10X3
CH572Everlight
CH572/CH570WCH (WCH.CN)
CH572QWCH (WCH.CN)
CH572RWCH (WCH.CN)TSSOP16
CH57XWCH (WCH.CN)
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