Part: CH334, CH335 — WCH

Type: 4-port USB HUB controller

Description: 4-port USB 2.0 HUB controller chips supporting high-speed 480Mbps, full-speed 12Mbps, and low-speed 1.5Mbps, with high-performance MTT mode (4 Transaction Translators) or cost-effective STT mode, and an industrial operating temperature range of -40 to 85 °C.

Operating Conditions:

• Operating temperature: -40 to 85 °C

Absolute Maximum Ratings:

• Max ESD performance (USB pins): 6 KV (Class 3A)

Key Specs:

• USB protocol compliance: USB 2.0
• Upstream port speeds: 480Mbps (high-speed), 12Mbps (full-speed), 1.5Mbps (low-speed)
• Downstream port speeds: 480Mbps (high-speed), backward compatible with USB 1.1
• Transaction Translator modes: MTT (4 TTs) or STT (single TT)
• Power-on reset delay (Trpor): 5mS to 14mS (approx. 12mS for batch 6, approx. 5mS-7mS for batch 1)
• External reset low-level pulse width: > 4uS
• External reset pull-up resistor: approx. 25KΩ
• Built-in LDO output: 3.3V

Features:

• Independent or GANG power control for each port
• Independent or GANG overcurrent detection for each port, with 5V tolerant overcurrent signal input
• Supports port status LED indicators (1-light, 5-light, 9-light for CH335)
• Configurable via external EEPROM or built-in information memory for custom VID, PID, and port configuration
• Self-developed dedicated USB PHY and LPM low-power technology
• Configurable for self-powered or bus-powered mode
• Built-in 12MHz crystal oscillator or supports external 12MHz input, with built-in PLL for 480MHz clock
• Built-in 1.5KΩ pull-up resistor on upstream port, built-in pull-down resistors on downstream ports
• Built-in LDO linear step-down regulator for 3.3V chip power
• CH335 supports MCU control to swap upstream port with 1# downstream port

Applications:

• Computer and industrial PC motherboards
• Peripherals
• Embedded systems

Package:

• QSOP16 (16-pin SMT)
• QSOP28 (28-pin SMT)
• SSOP28 (28-pin SMT)
• QFN16C_2x2 (16-pin)
• QFN16_3x3 (16-pin)
• QFN24_4x4 (24-pin)
• QFN28_4x4 (28-pin)
• QFN28_5x5 (28-pin)
• QFN36_6x6 (36-pin)
• LQFP48 (48-pin SMT)

• 4-port USB hub, providing 4 USB2.0 downstream ports, backward compatible with USB1.1 protocol specification
• Supports independent power control for each port or GANG overall linked power control
• Supports independent overcurrent detection for each port or GANG overall overcurrent detection, supports 5V tolerant overcurrent signal input
• Supports high-performance MTT mode, providing an independent TT for each port to achieve full-bandwidth concurrent transmission, with a total bandwidth 4 times that of STT
• Supports port status LED indicators
• Can be configured via external EEPROM to support composite devices, non-removable devices, custom VID, PID, and port configuration
• Built-in information memory, allowing batch customization of manufacturer or product information and configuration for special industry needs, without the need for EEPROM
• Self-developed dedicated USB PHY, LPM low-power technology, significantly reduced power consumption compared to the first-generation HUB chips, supports self-powered or bus-powered
• Can be configured for self-powered or bus-powered mode via I/O pins or external EEPROM
• Provides a crystal oscillator, built-in capacitors, supports external 12MHz input, built-in PLL provides 480MHz clock for USB PHY
• Built-in professional high-precision clock, can choose to remove the external 12MHz crystal, saving cost, reducing size, and lowering EMI
• Upstream port has a built-in 1.5KΩ pull-up resistor, downstream ports have built-in pull-down resistors required by USB Host, simplifying peripherals
• Built-in LDO linear step-down regulator, which can convert the USB bus power voltage to the chip's 3.3V operating power
• CH335 supports MCU control to swap the upstream port with the 1# downstream port
• USB pins have 6KV enhanced ESD performance, Class 3A
• Industrial operating temperature range: -40 ~ 85 °C
• Available in multiple package types such as QFN28, QFN24, QFN16, QSOP28

CH335P Pinout

Package: QFN-20 (with center pad)

Notes

• Pin 0# refers to the center/bottom pad of the QFN-20 package, which is connected to ground.
• DM/DP pins are multiplexed data/address lines for the parallel interface.
• LED3/SCL pin supports dual function: LED output or I²C serial clock.
• RESET#/CDP pin supports dual function: active-low reset or capacitive detection.
• XI/XO pins are for external crystal oscillator connection.

| | | | | Min | Typ | Max | Unit | | ------- | ------------------------------ | ------------------------------ | ----------- | ----------- | ------- | ----- | | VOL | Low Level | LED Pin, Sinking 15mA Current | | | 0.5 | 0.6 | V | | VOL | Output Voltage | PWREN# Pin, Sinking 4mA Current | | | 0.5 | 0.6 | V | | VOH | High Level | LED Pin, Sourcing 10mA Current | VDD33-0.6 | VDD33-0.5 | | V | | VOH | Output Voltage | PWREN# Pin, Sourcing 1mA Current | VDD33-0.6 | VDD33-0.5 | 4.3 | V | | IPU | Pull-up Current | LED1/2/3/PSELF/PGANG Pins | 16 | 40 | 80 | μA | | IPUOC | Pull-up Current | OVCUR# Pin | 8 | 14 | 24 | μA | | IPDOC | Pull-down Current | OVCUR# Pin | 2 | 5 | 40 | μA | | Vlvr | Power Low Voltage Reset Threshold Voltage | Power Low Voltage Reset Threshold Voltage | 2.6 | 3.0 | 3.2 | V |