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C1235414

The C1235414 is an electronic component. View the full C1235414 datasheet below including electrical characteristics, absolute maximum ratings.

Overview

Part: STM32G474xB STM32G474xC STM32G474xE — STMicroelectronics

Type: Arm Cortex-M4 32-bit MCU+FPU

Description: 32-bit Arm Cortex-M4 MCU with FPU, operating at up to 170 MHz (213 DMIPS), featuring 512 KB Flash memory, 96 KB SRAM, rich analog peripherals including 5 x 12-bit ADCs, 7 x 12-bit DACs, 7 comparators, 6 operational amplifiers, and a 184 ps 12-channel high-resolution timer.

Operating Conditions:

  • Supply voltage: 1.71 V to 3.6 V
  • Operating temperature: -40 to +85 °C (Ambient temperature, TA)
  • Max CPU frequency: 170 MHz

Absolute Maximum Ratings:

  • Max supply voltage: 4.0 V (VDD, VDDA, VDDIO2)
  • Max junction/storage temperature: -65 to +150 °C (Storage temperature, Tstg)

Key Specs:

  • CPU Frequency: up to 170 MHz
  • Flash Memory: 512 Kbytes with ECC support
  • SRAM: 96 Kbytes (plus 32 Kbytes CCM SRAM)
  • ADC Resolution: 12-bit, up to 16-bit with hardware oversampling
  • ADC Conversion Range: 0 to 3.6 V
  • DAC Channels: 7 x 12-bit
  • HRTIM Resolution: 184 ps
  • Internal 16 MHz RC Oscillator Accuracy: ± 1%

Features:

  • Arm 32-bit Cortex-M4 CPU with FPU, MPU, DSP instructions
  • Adaptive real-time accelerator (ART Accelerator) for 0-wait-state execution from Flash
  • Mathematical hardware accelerators: CORDIC for trigonometric functions, FMAC for filter operations
  • Low-power modes: sleep, stop, standby and shutdown
  • Multiple communication interfaces: 3x FDCAN, 4x I2C, 5x USART/UARTs, 1x LPUART, 4x SPIs, 1x SAI, USB 2.0 full-speed, USB Type-C/Power Delivery controller
  • 17 timers including 6x16-bit HRTIM with 184 ps resolution
  • 16-channel DMA controller
  • True random number generator (RNG)
  • Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™

Applications:

Package:

  • UFQFPN48
  • LQFP48
  • LQFP64
  • LQFP80
  • LQFP100
  • LQFP128
  • WLCSP81
  • TFBGA100
  • UFBGA121

Features

  • Core: Arm ® 32-bit Cortex ® -M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions
  • Operating conditions:
  • -VDD , V DDA voltage range: 1.71 V to 3.6 V
  • Mathematical hardware accelerators
  • -CORDIC for trigonometric functions acceleration
  • -FMAC: filter mathematical accelerator
  • Memories
  • -512 Kbytes of Flash memory with ECC support, two banks read-while-write, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP
  • -96 Kbytes of SRAM, with hardware parity check implemented on the first 32 Kbytes
  • -Routine booster: 32 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM)
  • -External memory interface for static memories FSMC supporting SRAM, PSRAM, NOR and NAND memories
  • -Quad-SPI memory interface
  • Reset and supply management
  • -Power-on/power-down reset (POR/PDR/BOR)
  • -Programmable voltage detector (PVD)
  • -Low-power modes: sleep, stop, standby and shutdown
  • -VBAT supply for RTC and backup registers
  • Clock management
  • -4 to 48 MHz crystal oscillator
  • -32 kHz oscillator with calibration
  • -Internal 16 MHz RC with PLL option (± 1%)

DS12288 Rev 5

  • channels, dead time generation and emergency stop
  • -1 x 16-bit timer with 2 x IC/OCs, one OCN/PWM, dead time generation and emergency stop
  • -2 x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop
  • -2 x watchdog timers (independent, window)
  • -1 x SysTick timer: 24-bit downcounter
  • -2 x 16-bit basic timers
  • -1 x low-power timer
  • Calendar RTC with alarm, periodic wakeup from stop/standby
  • Communication interfaces
  • -3 x FDCAN controller supporting flexible data rate
  • -4 x I 2 C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from stop
  • -5 x USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control)
  • -1 x LPUART
  • -4 x SPIs, 4 to 16 programmable bit frames, 2 x with multiplexed half duplex I 2 S interface
  • -1 x SAI (serial audio interface)
  • -USB 2.0 full-speed interface with LPM and BCD support
  • -IRTIM (infrared interface)
  • -USB Type-C™ /USB power delivery controller (UCPD)
  • True random number generator (RNG)
  • CRC calculation unit, 96-bit unique ID
  • Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™

Table 1. Device summary

ReferencePart number
STM32G474xBSTM32G474CB, STM32G474MB, STM32G474RB, STM32G474VB, STM32G474QB, STM32G474PB
STM32G474xCSTM32G474CC, STM32G474MC, STM32G474RC, STM32G474VC, STM32G474QC, STM32G474PC
STM32G474xESTM32G474CE, STM32G474ME, STM32G474RE, STM32G474VE, STM32G474QE, STM32G474PE

Table 1. Device summary

Electrical Characteristics

The definition and values of input/output AC characteristics are given in Figure 26 and Table 56 , respectively.

Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 17: General operating conditions .

200

Table 56. I/O (except FT_c) AC characteristics (1) (2)

SpeedSymbolParameterConditionsMinMaxUnit
00FmaxMaximum frequencyC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-5MHz
00FmaxMaximum frequencyC=50 pF, 1.62 V ≤ V DD ≤ 2.7 V-1MHz
00FmaxMaximum frequencyC=10 pF, 2.7 V ≤ V DD ≤ 3.6 V-10MHz
00FmaxMaximum frequencyC=10 pF, 1.62 V ≤ V DD ≤ 2.7 V-1.5MHz
00Tr/TfOutput rise and fall timeC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-25ns
00Tr/TfOutput rise and fall timeC=50 pF, 1.62 V ≤ V DD ≤ 2.7 V-52ns
00Tr/TfOutput rise and fall timeC=10 pF, 2.7 V ≤ V DD ≤ 3.6 V-17ns
00Tr/TfOutput rise and fall timeC=10 pF, 1.62 V ≤ V DD ≤ 2.7 V-37ns
01FmaxMaximum frequencyC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-25MHz
01FmaxMaximum frequencyC=50 pF, 1.62 V ≤ V DD ≤ 2.7 V-10MHz
01FmaxMaximum frequencyC=10 pF, 2.7 V ≤ V DD ≤ 3.6 V-50MHz
01FmaxMaximum frequencyC=10 pF, 1.62 V ≤ V DD ≤ 2.7 V-15MHz
Tr/TfOutput rise and fall timeC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-9ns
Tr/TfOutput rise and fall timeC=50 pF, 1.62 V ≤ V DD ≤ 2.7 V-16ns
Tr/TfOutput rise and fall timeC=10 pF, 2.7 V ≤ V DD ≤ 3.6 V-4.5ns
Tr/TfOutput rise and fall timeC=10 pF, 1.62 V ≤ V DD ≤ 2.7 V-9ns
10FmaxMaximum frequencyC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-50MHz
10FmaxMaximum frequencyC=50 pF, 1.62 V ≤ V DD ≤ 2.7 V-25MHz
10FmaxMaximum frequencyC=10 pF, 2.7 V ≤ V DD ≤ 3.6 V-100 (3)MHz
10FmaxMaximum frequencyC=10 pF, 1.62 V ≤ V DD ≤ 2.7 V-37.5MHz
10Tr/TfOutput rise and fall timeC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-5.8ns
10Tr/TfOutput rise and fall timeC=50 pF, 1.62 V ≤ V DD ≤ 2.7 V-11ns
10Tr/TfOutput rise and fall timeC=10 pF, 2.7 V ≤ V DD ≤ 3.6 V-2.5ns
10Tr/TfC=10 pF, 1.62 V ≤ V DD ≤ 2.7 V-5
11FmaxMaximum frequencyC=30 pF, 2.7 V ≤ V DD ≤ 3.6 V-120 (3)MHz
11FmaxMaximum frequencyC=30 pF, 1.62 V ≤ V DD ≤ 2.7 V-50MHz
11FmaxMaximum frequencyC=10 pF, 2.7 V ≤ V DD ≤ 3.6 V-180 (3)MHz
11FmaxC=10 pF, 1.62 V ≤ V DD ≤ 2.7 V-75
11Tr/TfOutput rise andC=30 pF, 2.7 V ≤ V DD ≤ 3.6 V-3.3ns
11Tr/TfOutput rise andC=30 pF, 1.62 V ≤ V DD ≤ 2.7 V-6ns
11Tr/Tffall time (4)C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V-1.7ns
11Tr/TfC=10 pF, 1.62 V ≤ V DD ≤ 2.7 V-3.3ns

Table 56. I/O (except FT_c) AC characteristics (1) (2)

Table 56. I/O (except FT_c) AC characteristics (1) (2) (continued)

SpeedSymbolParameterConditionsMinMaxUnit
FM+Fmax (5)Maximum frequencyC=50 pF, 1.6 V ≤ V DD ≤ 3.6 V-1MHz
FM+Tr/TF (4)Output high to low level fall timeC=50 pF, 1.6 V ≤ V DD ≤ 3.6 V-5ns
  1. The I/O speed is configured using the OSPEEDRy[1:0] bits. The Fm+ mode is configured in the SYSCFG_CFGR1 register. Refer to the reference manual RM0440 "STM32G4 Series advanced Arm ® based 32-bit MCUs" for a description of GPIO Port configuration register.
  2. Guaranteed by design.
  3. This value represented the I/O capability but maximum system frequency is 170 MHz.
  4. The fall time is defined between 70% and 30% of the output waveform accordingly to I2C specification.
  5. The maximum frequency is defined with the following conditions:
  • 45%<Duty cycle<55%
  • (Tr+ Tf) ≤ 2/3 T.
  1. The I/O speed is configured using the OSPEEDRy[1:0] bits. The Fm+ mode is configured in the SYSCFG_CFGR1 register. Refer to the reference manual RM0440 "STM32G4 Series advanced Arm ® based 32-bit MCUs" for a description of GPIO Port configuration register.
  2. Guaranteed by design.

Table 57. I/O FT_c AC characteristics (1) (2)

SpeedSymbolParameterConditionsMinMaxUnit
0FmaxMaximum frequencyC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-2MHz
0FmaxMaximum frequencyC=50 pF, 1.6 V ≤ V DD ≤ 2.7 V-1MHz
0Tr/TfOutput H/L to L/H level fall timeC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-170ns
0Tr/TfOutput H/L to L/H level fall timeC=50 pF, 1.6 V ≤ V DD ≤ 2.7 V-330ns
1FmaxMaximum frequencyC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-10MHz
1FmaxMaximum frequencyC=50 pF, 1.6 V ≤ V DD ≤ 2.7 V-5MHz
1Tr/TfOutput H/L to L/H level fall timeC=50 pF, 2.7 V ≤ V DD ≤ 3.6 V-35ns
1Tr/TfOutput H/L to L/H level fall timeC=50 pF, 1.6 V ≤ V DD ≤ 2.7 V-65ns

200

Absolute Maximum Ratings

Stresses above the absolute maximum ratings listed in Table 14: Voltage characteristics , Table 15: Current characteristics and Table 16: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 qualification standard, extended mission profiles are available on demand.

Table 14. Voltage characteristics (1)

SymbolRatingsMinMaxUnit
V DD - V SSExternal main supply voltage (including V DD , V DDA , V BAT and V REF+ )-0.34.0V
V IN (2)Input voltage on FT_xxx pins except FT_c pinsV SS -0.3min (V DD ,V DDA ) + 4.0 (3)(4)V
V IN (2)Input voltage on FT_c pinsV SS -0.35.5V
V IN (2)Input voltage on TT_xx pinsV SS -0.34.0V
V IN (2)Input voltage on any other pinsV SS -0.34.0V
\∆ V DDx \Variations between different V DDX power pins of the same domain-
\V SSx -V SS \Variations between all the different ground pins (5)-
V REF+ -V DDAAllowed voltage difference for V REF+ > V DDA-0.4V

Table 14. Voltage characteristics (1)

  1. VIN maximum must always be respected. Refer to Table 15: Current characteristics for the maximum allowed injected current values.
  2. This formula has to be applied only on the power supplies related to the IO structure described in the pin definition table.
  3. To sustain a voltage higher than 4 V the internal pull-up/pull-down resistors must be disabled.
  4. Include VREF- pin.
  5. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count LQFP packages.
  6. Positive injection (when V IN > V DD ) is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
  7. A negative injection is induced by VIN < VSS. IINJ(PIN) must never be exceeded. Refer also to Table 14: Voltage characteristics for the minimum allowed input voltage values.
  8. When several inputs are submitted to a current injection, the maximum ∑ |I INJ(PIN) | is the absolute sum of the negative injected currents (instantaneous values).

Table 15. Current characteristics

SymbolRatingsMaxUnit
∑ IV DDTotal current into sum of all V DD power lines (source) (1)150mA
∑ IV SSTotal current out of sum of all V SS ground lines (sink) (1)150mA
IV DD(PIN)Maximum current into each V DD power pin (source) (1)100mA
IV SS(PIN)Maximum current out of each V SS ground pin (sink) (1)100mA
I IO(PIN)Output current sunk by any I/O and control pin except FT_f20mA
I IO(PIN)Output current sunk by any FT_f pin20mA
I IO(PIN)Output current sourced by any I/O and control pin20mA
∑ I IO(PIN)Total output current sunk by sum of all I/Os and control pins (2)100mA
∑ I IO(PIN)Total output current sourced by sum of all I/Os and control pins (2)100mA
I INJ(PIN) (3)Injected current on FT_xxx, TT_xx, NRST pins-5/0 (4)mA
∑ \I INJ(PIN) \Total injected current (sum of all I/Os and control pins) (5)

Table 16. Thermal characteristics

SymbolRatingsValueUnit
T STGStorage temperature range-65 to +150°C
T JMaximum junction temperature150°C

200

Thermal Information

The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max x Θ JA )

Package Information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.

Related Variants

The following components are covered by the same datasheet.

Part NumberManufacturerPackage
STM32G474CBSTMicroelectronics
STM32G474MBSTMicroelectronics
STM32G474QBSTMicroelectronics
STM32G474RBSTMicroelectronicsBGA-64
STM32G474VBSTMicroelectronics
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