BQ24295RGER
The BQ24295RGER is an electronic component from Texas Instruments. View the full BQ24295RGER datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Battery Management
Key Specifications
| Parameter | Value |
|---|---|
| Packaging | MouseReel |
| Standard Pack Qty | 3000 |
Overview
| BIT | FIELD | TYPE | RESET | DESCRIPTION | NOTE |
|---|---|---|---|---|---|
| Bit 7 | EN_HIZ | R/W | 0 | 0 - Disable, 1 - Enable | Default: Disable (0) |
| Input Voltage Limit | Input Voltage Limit | Input Voltage Limit | Input Voltage Limit | Input Voltage Limit | Input Voltage Limit |
| Bit 6 | VINDPM[3] | R/W | 1 | 640 mV | Offset 3.88 V, Range: 3.88 V - 5.08 V Default: 4.76 V (1011) |
| Bit 5 | VINDPM[2] | R/W | 0 | 320 mV | Offset 3.88 V, Range: 3.88 V - 5.08 V Default: 4.76 V (1011) |
| Bit 4 | VINDPM[1] | R/W | 1 | 160 mV | Offset 3.88 V, Range: 3.88 V - 5.08 V Default: 4.76 V (1011) |
| Bit 3 | VINDPM[0] | R/W | 1 | 80 mV | Offset 3.88 V, Range: 3.88 V - 5.08 V Default: 4.76 V (1011) |
| Input Current Limit (Actual input current limit is the lower of I 2 C and ILIM) | Input Current Limit (Actual input current limit is the lower of I 2 C and ILIM) | Input Current Limit (Actual input current limit is the lower of I 2 C and ILIM) | Input Current Limit (Actual input current limit is the lower of I 2 C and ILIM) | Input Current Limit (Actual input current limit is the lower of I 2 C and ILIM) | Input Current Limit (Actual input current limit is the lower of I 2 C and ILIM) |
| Bit 2 | IINLIM[2] | R/W | 0 | 000 - 100 mA, 001 - 150 mA, 010 - 500 mA, 011 - 900 mA, 100 - 1 A, 101 - 1.5 A, 110 - 2 A, 111 - 3A | Default SDP: 500 mA (010) Default DCP/CDP: 3 A (101) Default Divider 1 and 2: 2 A (110) Default Divider 3: 1 A (100) |
| Bit 1 | IINLIM[1] | R/W | 0 | 000 - 100 mA, 001 - 150 mA, 010 - 500 mA, 011 - 900 mA, 100 - 1 A, 101 - 1.5 A, 110 - 2 A, 111 - 3A | Default SDP: 500 mA (010) Default DCP/CDP: 3 A (101) Default Divider 1 and 2: 2 A (110) Default Divider 3: 1 A (100) |
| Bit 0 | IINLIM[0] | R/W | 0 | 000 - 100 mA, 001 - 150 mA, 010 - 500 mA, 011 - 900 mA, 100 - 1 A, 101 - 1.5 A, 110 - 2 A, 111 - 3A | Default SDP: 500 mA (010) Default DCP/CDP: 3 A (101) Default Divider 1 and 2: 2 A (110) Default Divider 3: 1 A (100) |
Pin Configuration
RGE Package 24-Pin VQFN With Exposed Thermal Pad (Top View)
Pin Functions
| PIN | PIN | TYPE | DESCRIPTION |
|---|---|---|---|
| NAME | NUMBER | TYPE | DESCRIPTION |
| VBUS | 1,24 | P | Charger Input Voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between VBUS and PMID with VBUS on source. Place a 1-μF ceramic capacitor from VBUS to PGND and place it as close as possible to IC. |
| D+ | 2 | I Analog | Positive line of the USB data line pair. D+/D- based USB host/charging port detection. The detection includes data contact detection (DCD) and primary detection in bc1.2. |
| D- | 3 | I Analog | Negative line of the USB data line pair. D+/D- based USB host/charging port detection. The detection includes data contact detection (DCD) and primary detection in bc1.2. |
| STAT | 4 | O | Open drain charge status output to indicate various charger operation. Connect to the pull up rail via 10-k Ω resistor. LOW indicates charge in progress. HIGH indicates charge complete or charge disabled. When any fault condition occurs, STAT pin in the charge blinks at 1 Hz. |
| SCL | 5 | I | I 2 C Interface clock. Connect SCL to the logic rail through a 10-k Ω resistor. |
| SDA | 6 | I/O | I 2 C Interface data. Connect SDA to the logic rail through a 10-k Ω resistor. |
| INT | 7 | O | Open-drain Interrupt Output. Connect the INT to a logic rail via 10k Ω resistor. The INT pin sends active low, 256-μs pulse to host to report charger device status and fault. |
| OTG | 8 | I Digital | OTG Enable pin. The boost mode is activated when the OTG pin is High, REG01[5] = 1, and no Input source is detected at VBUS. |
| CE | 9 | I | Active low Charge Enable pin. Battery charging is enabled when REG01[5:4] = 01 and CE pin = Low. CE pin must be pulled high or low. |
| ILIM | 10 | I | ILIM pin sets the maximum input current limit by regulating the ILIM voltage at 1 V. A resistor is connected from ILIM pin to ground to set the maximum limit as I INMAX = (1V/R ILIM ) × K ILIM . The actual input current limit is the lower one set by ILIM and by I 2 C REG00[2:0]. The minimum input current programmed on ILIM pin is 500 mA. |
| TS | 11 | I Analog | Temperature qualification voltage input. Connect a negative temperature coefficient thermistor. Program temperature window with a resistor divider from REGN to TS to GND. Charge suspends or Boost disable when TS pin is out of range. A 103AT-2 thermistor is recommended. |
| QON | 12 | I | BATFET enable control in shipping mode. A logic low to high transition on this pin with minimum 2ms high level turns on BATFET to exit shipping mode. It has internal 1M Ω (Typ) pull down. For backward compatibility, when BATFET enable control function is not used, the pin can be a no connect or tied to TS pin (10k NTC thermistor only). (Refer to Shipping Mode for detail description). |
| BAT | 13,14 | P | Battery connection point to the positive pin of the battery pack. The internal BATFET is connected between BAT and SYS. Connect a 10 μF closely to the BAT pin. |
Pin Functions
Electrical Characteristics
VVBUS_UVLOZ < VVBUS < VACOV and VVBUS > VBAT + VSLEEP, TJ = -40°C to 125°C and TJ = 25°C for typical values unless other noted.
| PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS |
| I BAT | Battery discharge current (BAT, SW, SYS) | V VBUS < V UVLO , VBAT = 4.2 V, leakage between BAT and VBUS | 5 | μA | ||
| High-Z Mode, or no VBUS, BATFET disabled (REG07[5] = 1), -40°C - 85°C | 16 | 20 | μA | |||
| High-Z Mode, or no VBUS, BATFET enabled (REG07[5] = 0), -40°C - 85°C | 32 | 55 | μA | |||
| I VBUS | Input supply current (VBUS) | V VBUS = 5 V, High-Z mode, No battery | 15 | 30 | μA | |
| I VBUS | V VBUS > V UVLO , V VBUS > V BAT , converter not switching | 1.5 | 3 | mA | ||
| I VBUS | V VBUS > V UVLO , V VBUS > V BAT , converter switching, V BAT = 3.2 V, I SYS = 0 A | 4 | mA | |||
| I VBUS | V VBUS > V UVLO , V VBUS > V BAT , converter switching, charge disable, V BAT = 3.8 V, I SYS = 100 μA | 3.5 | mA | |||
| I BOOST | Battery discharge current in boost mode | VBAT = 4.2 V, Boost mode, I PMID = 0 A, converter switching | 3.5 | mA | ||
| VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP |
| V VBUS_OP | VBUS operating voltage | 3.9 | 6.2 | V | ||
| V VBUS_UVLOZ | VBUS for active I 2 C, no battery | V VBUS rising | 3.6 | V | ||
| V SLEEP | Sleep mode falling threshold | V VBUS falling, V VBUS-VBAT | 35 | 80 | 120 | mV |
| V SLEEPZ | Sleep mode rising threshold | V VBUS rising, V VBUS-VBAT | 170 | 250 | 350 | mV |
| V ACOV | VBUS over-voltage rising threshold | V VBUS rising | 6.2 | 6.6 | V | |
| V ACOV_HYST | VBUS over-voltage falling hysteresis | V VBUS falling | 250 | mV | ||
| V BAT_UVLOZ | Battery for active I 2 C, no VBUS | V BAT rising | 2.3 | V | ||
| V BAT_DPL | Battery depletion threshold | V BAT falling | 2.4 | 2.6 | V | |
| V BAT_DPL_HY | Battery depletion rising hysteresis | V BAT rising | 200 | mV | ||
| V VBUSMIN | Bad adapter detection threshold | V VBUS falling | 3.8 | V | ||
| I BADSRC | Bad adapter detection current source | 30 | mA |
Absolute Maximum Ratings
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Voltage (with respect to GND) | VBUS (converter not switching) | -2 | 15 (2) | V |
| Voltage (with respect to GND) | PMID (converter not switching) | -0.3 | 15 (2) | V |
| Voltage (with respect to GND) | STAT | -0.3 | 12 | V |
| Voltage (with respect to GND) | BTST | -0.3 | 12 | V |
| Voltage (with respect to GND) | SW | -2 | 7 8 (Peak for 20ns duration) | V |
| Voltage (with respect to GND) | BAT, SYS (converter not switching) | -0.3 | 6 | V |
| Voltage (with respect to GND) | SDA, SCL, INT, OTG, ILIM, REGN, TS, QON, CE, D+, D-, | -0.3 | 7 | V |
| Voltage (with respect to GND) | BTST TO SW | -0.3 | 7 | V |
| Voltage (with respect to GND) | PGND to GND | -0.3 | 0.3 | V |
| Output sink current | INT, STAT | 6 | mA | |
| Junction temperature | -40 | 150 | °C | |
| Storage temperature range, T stg | -65 | 150 | °C |
Recommended Operating Conditions
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| V IN | Input voltage | 3.9 | 6.2 (1) | V |
| I IN | Input current (VBUS) | 3 | A | |
| I SYS | Output current (SYS) | 3.5 | A | |
| V BAT | Battery voltage | 4.4 | V | |
| I BAT | Fast charging current | 3 | A | |
| I BAT | Discharging current with internal MOSFET | 5.5 | A | |
| T A | Operating free-air temperature range | -40 | 85 | °C |
Thermal Information
| THERMAL METRIC (1) | THERMAL METRIC (1) | bq24295 RGE (24 PIN) | UNIT |
|---|---|---|---|
| R θ JA | Junction-to-ambient thermal resistance | 32.2 | °C/W |
| R θ JCtop | Junction-to-case (top) thermal resistance | 29.8 | °C/W |
| R θ JB | Junction-to-board thermal resistance | 9.1 | °C/W |
| ψ JT | Junction-to-top characterization parameter | 0.3 | °C/W |
| ψ JB | Junction-to-board characterization parameter | 9.1 | °C/W |
| R θ JCbot | Junction-to-case (bottom) thermal resistance | 2.2 | °C/W |
Typical Application
A typical application consists of the device configured as an I 2 C controlled power path management device and a single cell Li-Ion battery charger for single cell Li-Ion and Li-polymer batteries used in a wide range of tablets and other portable devices. It integrates an input reverse-blocking FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3), and BATFET (Q4) between the system and battery. The device also integrates a bootstrap diode for the high-side gate drive.
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