ATECC608A-SSHDA-T
CryptoAuthentication DeviceThe ATECC608A-SSHDA-T is a cryptoauthentication device from Microchip Technology. View the full ATECC608A-SSHDA-T datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Microchip Technology
Category
CryptoAuthentication Device
Overview
Part: ATECC608A — Microchip Type: Cryptographic Co-Processor Description: A high-security cryptographic co-processor with secure hardware-based key storage, supporting asymmetric (ECDSA, ECDH) and symmetric (SHA-256, AES-128) algorithms, and featuring a high-quality RNG, unique 72-bit serial number, and I2C or Single Pin Interface.
Operating Conditions:
- Supply voltage: 2.0V to 5.5V
- IO Levels: 1.8V to 5.5V
- Operating temperature: -40°C to +85°C
- I2C interface speed: up to 1 Mb/s
Absolute Maximum Ratings:
- Max supply voltage: 6.0V
- Max continuous current: 5.0 mA (DC Output Current)
- Max storage temperature: +150°C
Key Specs:
- Sleep Current: <150 nA
- EEPROM Write Endurance: 400,000 Write Cycles (at +85°C, Each Byte)
- EEPROM Data Retention: 10 Years (at +55°C)
- EEPROM Data Retention: 30 Years (at +35°C)
- EEPROM Read Endurance: Unlimited Read Cycles
- Power-Up Delay (tPU): 100 μs (Minimum time between VCC > VCC min prior to measurement of tWLO)
- Wake Low Duration (tWLO): 60 μs
- Wake High Delay to Data Comm. (tWHI): 1500 μs
- Watchdog Timeout (Config.ChipMode.Bit2 is 0): 0.7 s (Typ 1.3 s, Max 1.7 s)
Features:
- Protected Storage for up to 16 Keys, Certificates or Data
- Hardware Support for ECDSA, ECDH, SHA-256, HMAC, AES-128
- NIST Standard P256 Elliptic Curve Support
- Turnkey PRF/HKDF calculation for TLS 1.2 & 1.3
- Internal High-Quality NIST SP 800-90A/B/C Random Number Generator (RNG)
- Two High-Endurance Monotonic Counters
- Guaranteed Unique 72-bit Serial Number
- High-speed Single Pin Interface or 1 MHz Standard I2C Interface
Applications:
- IoT network endpoint key management & exchange
- Encryption for small messages and PII data
- Secure Boot and Protected Download
- Ecosystem Control, Anti-cloning
Package:
- 8-pad UDFN
- 8-lead SOIC
- 3-lead Contact
Features
- Cryptographic Co-Processor with Secure Hardware-based Key Storage:
- -Protected Storage for up to 16 Keys, Certificates or Data
- Hardware Support for Asymmetric Sign, Verify, Key Agreement:
- -ECDSA: FIPS186-3 Elliptic Curve Digital Signature
- -ECDH: FIPS SP800-56A Elliptic Curve Diffie-Hellman
- -NIST Standard P256 Elliptic Curve Support
- Hardware Support for Symmetric Algorithms:
- -SHA-256 & HMAC Hash including off-chip context save/restore
- -AES-128: Encrypt/Decrypt, Galois Field Multiply for GCM
- Networking Key Management Support:
- -Turnkey PRF/HKDF calculation for TLS 1.2 & 1.3
- -Ephemeral key generation and key agreement in SRAM
- -Small message encryption with keys entirely protected
- Secure Boot Support:
- -Full ECDSA code signature validation, optional stored digest/signature
- -Optional communication key disablement prior to secure boot
- -Encryption/Authentication for messages to prevent on-board attacks
- Internal High-Quality NIST SP 800-90A/B/C Random Number Generator (RNG)
- Two High-Endurance Monotonic Counters
- Guaranteed Unique 72-bit Serial Number
- Two Interface Options Available:
- -High-speed Single Pin Interface with One GPIO Pin
- -1 MHz Standard I 2 C Interface
- 1.8V to 5.5V IO Levels, 2.0V to 5.5V Supply Voltage
- <150 nA Sleep Current
- 8-pad UDFN and 8-lead SOIC Packages
Applications
- IoT network endpoint key management & exchange
- Encryption for small messages and PII data
- Secure Boot and Protected Download
- Ecosystem Control, Anti-cloning
Pin Configuration
Table 1. Pin Configuration
| Pin | Function |
|---|---|
| NC | No Connect |
| GND | Ground |
| SDA | Serial Data |
| SCL | Serial Clock Input |
| VCC | Power Supply |
Figure 1. Pinouts
Table 1. Pin Configuration
| 8-lead SOIC (Top View) | 8-lead SOIC (Top View) | 8-lead SOIC (Top View) | 8-pad UDFN (Top View) | 8-pad UDFN (Top View) | 8-pad UDFN (Top View) | 8-pad UDFN (Top View) |
|---|---|---|---|---|---|---|
| 1 NC | 8 | V CC | NC | 1 | 8 | V CC |
| 2 NC | 7 | NC | NC | 2 | 7 | NC |
| 3 NC | 6 | SCL | NC | 3 | 6 | SCL |
| 4 GND | 5 | SDA | GND | 4 | 5 | SDA |
(Top View)
1
2
3
SDA
GND
VCC
Electrical Characteristics
| Parameter | Symbol | Direction | Min. | Typ. | Max. | Unit | Conditions |
|---|---|---|---|---|---|---|---|
| Start Pulse Duration | tSTART | To Crypto Authentication | 4.1 | 4.34 | 4.56 | μs | |
| Start Pulse Duration | tSTART | From Crypto Authentication | 4.6 | 6 | 8.60 | μs | |
| Zero Transmission High Pulse | t ZHI | To Crypto Authentication | 4.1 | 4.34 | 4.56 | μs | |
| Zero Transmission High Pulse | t ZHI | From Crypto Authentication | 4.6 | 6 | 8.60 | μs | |
| Zero Transmission Low Pulse | tZLO | To Crypto Authentication | 4.1 | 4.34 | 4.56 | μs | |
| Zero Transmission Low Pulse | tZLO | From Crypto Authentication | 4.6 | 6 | 8.60 | μs | |
| Bit Time(1) | t BIT | To Crypto Authentication | 37 | 39 | - | μs | If the bit time exceeds tTIMEOUT then ATECC608A may enter the sleep mode. . |
| Bit Time(1) | t BIT | From Crypto Authentication | 41 | 54 | 78 | μs | |
| Turn Around Delay | tTURNARO UND | From Crypto Authentication | 64 | 96 | 131 | μs | ATECC608A will initiate the first low going transition after this time interval following the initial falling edge of the start pulse of the last bit of the transmit flag. |
| Turn Around Delay | tTURNARO UND | To Crypto Authentication | 93 | - | - | μs | After ATECC608A transmits the last bit of a group, system must wait this interval before sending the first bit of a flag. It is measured from the falling edge of the start pulse of the last bit transmitted by ATECC608A . |
| IO Timeout | tTIMEOUT | To Crypto Authentication | 45 | 65 | 85 | ms | ATECC608A may transition to the sleep mode if the bus is inactive longer than this duration. |
Note: START, ZLO, ZHI, and BIT are designed to be compatible with a standard UART running at 230.4 Kbaud for both transmit and receive. The UART should be set to seven data bits, no parity and one Stop bit.
Absolute Maximum Ratings
Operating Temperature
-40°C to +85°C
Storage Temperature
-65°C to +150°C
Maximum Operating Voltage
6.0V
DC Output Current
5.0 mA
Voltage on any pin -0.5V to (VCC + 0.5V)
-0.5V to (VCC + 0.5V)
Note: Stresses beyond those listed under 'Absolute Maximum Ratings' may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information
| Units | MILLIMETERS | MILLIMETERS | MILLIMETERS | |
|---|---|---|---|---|
| Dimension Limits | Dimension Limits | MIN | NOM | MAX |
| Contact Pitch | E | 1.27 BSC | ||
| Contact Pad Spacing | C | 5.40 | ||
| Contact Pad Width (X8) | X1 | 0.60 | ||
| Contact Pad Length (X8) | Y1 | 1.55 |
© 2017 Microchip Technology Inc.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| ATECC508A | Microchip Technology | — |
| ATECC608A | Microchip Technology | — |
| ATECC608A-MAHCZ-S | Microchip Technology | — |
| ATECC608A-MAHCZ-T | Microchip Technology | — |
| ATECC608A-MAHDA-S | Microchip Technology | — |
| ATECC608A-MAHDA-T | Microchip Technology | — |
| ATECC608A-SSHCZ-B | Microchip Technology | — |
| ATECC608A-SSHCZ-T | Microchip Technology | — |
| ATECC608A-SSHDA-B | Microchip Technology | — |
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