AT32F403A
ARM Cortex-M4 MCUThe AT32F403A is a arm cortex-m4 mcu from Artery Technology. View the full AT32F403A datasheet below including electrical characteristics.
Manufacturer
Artery Technology
Category
ARM Cortex-M4 MCU
Overview
Part: AT32F403A — Artery Technology
Type: ARM Cortex-M4 MCU+FPU
Description: 32-bit ARM Cortex-M4 MCU with FPU operating at up to 240 MHz, featuring 256 to 1024 KB Flash, up to 96+128 KB SRAM, 3 x 12-bit ADCs, 2 x 12-bit DACs, and 20 communication interfaces including USBFS.
Operating Conditions:
- Supply voltage: 2.6–3.6 V
- Operating temperature: -40 to +105 °C
- Max frequency: 240 MHz
Absolute Maximum Ratings:
- Max supply voltage: 4.0 V
- Max continuous current: 150 mA (IVDD total)
- Max junction/storage temperature: 125 °C
Key Specs:
- Core: ARM 32-bit Cortex-M4 CPU with FPU
- Max frequency: 240 MHz
- Flash memory: 256 to 1024 KBytes
- SRAM: Up to 96+128 KBytes
- ADC: 3 x 12-bit, 2 MSPS
- DAC: 2 x 12-bit
- Max SPI speed: 50 Mbit/s
- Max Run mode current: 100 mA (VDD, fHCLK = 240 MHz, all peripherals enabled)
Features:
- ARM 32-bit Cortex-M4 CPU with FPU and DSP instructions
- Memory protection unit (MPU)
- sLib: configurable secured Flash library area
- SPIM interface for up to 16 MBytes external SPI Flash
- External memory controller (XMC) with 16-bit data bus (PSRAM/NOR, NAND, LCD parallel interface)
- Low power modes: Sleep, Deepsleep, and Standby
- Clock management: 4-25 MHz HEXT, 48 MHz HICK (1% accuracy at 25°C), 32 kHz LEXT, LICK
- Temperature sensor (VTS) and internal reference voltage (VINTRV)
- 14-channel DMA controller
- Up to 80 fast GPIOs, almost all 5 V-tolerant
- Up to 17 timers (2 advanced motor control, 8+2 general-purpose, 2 basic, 2 watchdog, SysTick)
- Up to 20 communication interfaces: 3 x I2C, 8 x USART, 4 x SPI, 2 x CAN, USB 2.0 full speed, 2 x SDIO
- CRC calculation unit, 96-bit unique ID (UID)
- Debug: SWD, JTAG, Cortex-M4 Embedded Trace Macrocell (ETM)
Package:
- LQFP100 14 x 14 mm
- LQFP64 10 x 10 mm
- LQFP48 7 x 7 mm
- QFN48 6 x 6 mm
Features
| AT32F403AxxU7 | AT32F403AxxU7 | AT32F403AxxU7 | AT32F403AxxT7 | AT32F403AxxT7 | AT32F403AxxT7 | AT32F403AxxT7 | AT32F403AxxT7 | AT32F403AxxT7 | AT32F403AxxT7 | AT32F403AxxT7 | AT32F403AxxT7 | ||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Part Number | Part Number | CC | CE | CG | CC | CE | CG | RC | RE | RG | VC | VE | VG |
| CPU frequency (MHz) | CPU frequency (MHz) | 240 | 240 | 240 | 240 | 240 | 240 | 240 | 240 | 240 | 240 | 240 | 240 |
| Int. Flash (1)(2) | ZW (KBytes) | 256 | 256 | 256 | 256 | 256 | 256 | 256 | 256 | 256 | 256 | 256 | 256 |
| Int. Flash (1)(2) | NZW (KBytes) | 0 | 256 | 768 | 0 | 256 | 768 | 0 | 256 | 768 | 0 | 256 | 768 |
| Int. Flash (1)(2) | Total (KBytes) | 256 | 512 | 1024 | 256 | 512 | 1024 | 256 | 512 | 1024 | 256 | 512 | 1024 |
| SRAM (2) (KBytes) | SRAM (2) (KBytes) | 96 + 128 | 96 + 128 | 96 + 128 | 96 + 128 | 96 + 128 | 96 + 128 | 96 + 128 | 96 + 128 | 96 + 128 | 96 + 128 | 96 + 128 | 96 + 128 |
| SPIM (3) | SPIM (3) | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB | ch / up to 16 MB |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ||
| (4) | (4) | (4) | (4) | (4) | (4) | (4) | (4) | (4) | (4) | (4) | (4) | ||
| XMC | - - 1 1 | - - 1 1 | - - 1 1 | - - 1 1 | - - 1 1 | - - 1 1 | - - 1 1 2 2 | - - 1 1 2 2 | - - 1 1 2 2 | - - 1 1 2 2 | - - 1 1 2 2 | - - 1 1 2 2 | |
| Advanced | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | |||||||
| 32-bit general-purpose | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | |
| Basic | 8 8 2 2 | 8 8 2 2 | 8 8 2 2 | 8 8 2 2 | 8 8 2 2 | 8 8 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | 2 2 | |
| SysTick | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | |
| WDT | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | |
| WWDT | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | |||||||
| RTC | 1 1 1 1 | 1 1 1 1 | 1 1 1 1 | 1 1 1 1 | 1 1 1 1 | 1 1 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | |
| I 2 C | 3 3 | 3 3 | 3 3 | 3 3 | 3 3 | 3 3 | 3 3 | 3 3 | 3 3 | 3 3 | 3 3 | 3 3 | |
| SPI (5) | 4 4 | 4 4 | 4 4 | 4 4 | 4 4 | 4 4 | 4 4 | 4 4 | 4 4 | 4 4 | 4 4 | 4 4 | |
| I 2 S (5) USART + UART | 4 (2 full-duplex) 4 (2 full-duplex) | 4 (2 full-duplex) 4 (2 full-duplex) (6) | 4 (2 full-duplex) 4 (2 full-duplex) | 4 (2 full-duplex) 4 (2 full-duplex) | 4 (2 full-duplex) 4 (2 full-duplex) (6) | 4 (2 full-duplex) 4 (2 full-duplex) | 4 (2 full-duplex) 4 (2 full-duplex) | 4 (2 full-duplex) 4 (2 full-duplex) | 4 (2 full-duplex) 4 (2 full-duplex) | 4 (2 full-duplex) 4 (2 full-duplex) | 4 (2 full-duplex) 4 (2 full-duplex) | 4 (2 full-duplex) 4 (2 full-duplex) | |
| + 4 3 + 4 1 (7) 1 (7) | + 4 3 + 4 1 (7) 1 (7) | + 4 3 + 4 1 (7) 1 (7) | + 4 3 + 4 1 (7) 1 (7) | + 4 3 + 4 1 (7) 1 (7) | + 4 3 + 4 1 (7) 1 (7) | 4 + 4 4 + 4 2 2 | 4 + 4 4 + 4 2 2 | 4 + 4 4 + 4 2 2 | 4 + 4 4 + 4 2 2 | 4 + 4 4 + 4 2 2 | 4 + 4 4 + 4 2 2 | ||
| USBFS device | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | 1 1 | |
| CAN 12-bit ADC numbers/channels | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | 2 2 2 2 3 | |
| 12-bit DAC numbers | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | 10 10 16 16 2 | |
| 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | 37 37 51 80 -40 to +105 ° C | ||
| QFN48 LQFP48 | QFN48 LQFP48 | QFN48 LQFP48 | QFN48 LQFP48 | QFN48 LQFP48 | QFN48 LQFP48 | LQFP64 LQFP100 | LQFP64 LQFP100 | LQFP64 LQFP100 | LQFP64 LQFP100 | LQFP64 LQFP100 | LQFP64 LQFP100 | ||
| Packages | Packages | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm | 6 x 6 mm 7 x 7 mm 10 x 10 mm 14 x 14 mm |
- (4) For LQFP64 package, XMC only supports the LCD panel with 8-bit mode.
(5) I 2 S shares the same pin with SPI.
- (6) For LQFP48 and QFN48 packages, UART8 is not available and USART6 is used as UART for no CK pin.
- (7) For LQFP48 and QFN48 packages, only SDIO2 exists and supports maximum 4-bit (D0~D3) mode.
Pin Configuration
Figure 2. AT32F403A LQFP100 pinout
Figure 3. AT32F403A LQFP64 pinout
Figure 4. AT32F403A LQFP48 pinout
Figure 5. AT32F403A QFN48 pinout
The table below is the pin definition of the AT32F403A. '-' presents there is no such pinout on the related package. The multi-functions list follows priority from high to low. In principle, the analog signals have priority over the digital signals, and the digital output signals have priority over the digital input signals.
Table 6. AT32F403A series pin definitions
| Pin number | Pin number | Pin number | (2) | Multi-functions (4) | Multi-functions (4) | |||
|---|---|---|---|---|---|---|---|---|
| LQFP48 QFN48 | LQFP64 | LQFP100 | Pin name | Type (1) | IO level | Main function (3) | Default | Remap |
| - | - | 1 | PE2 | I/O | FT | PE2 | SPI4_SCK (7) / I2S4_CK (7) / XMC_A23 / TRACECK | - |
| - | - | 2 | PE3 | I/O | FT | PE3 | XMC_A19 / TRACED0 | - |
| - | - | 3 | PE4 | I/O | FT | PE4 | SPI4_CS (7) / I2S4_WS (7) / XMC_A20 / TRACED1 | - |
| - | - | 4 | PE5 | I/O | FT | PE5 | SPI4_MISO (7) / XMC_A21 / TRACED2 | TMR9_CH1 |
| - | - | 5 | PE6 | I/O | FT | PE6 | SPI4_MOSI (7) / I2S4_SD (7) / XMC_A22 / TRACED3 | TMR9_CH2 |
| 1 | 1 | 6 | V BAT | S | - | V BAT | - | - |
| 2 | 2 | 7 | TAMPER-RTC / PC13 (5) | I/O | TC | PC13 (6) | TAMPER-RTC | - |
| 3 | 3 | 8 | LEXT_IN / PC14 (5) | I/O | TC | PC14 (6) | LEXT_IN | - |
| 4 | 4 | 9 | LEXT_OUT / PC15 (5) | I/O | TC | PC15 (6) | LEXT_OUT | - |
| - | - | 10 | V SS_5 | S | - | V SS_5 | - | - |
| - | - | 11 | V DD_5 | S | - | V DD_5 | - | - |
| - | - | 12 | HEXT_IN | I | - | HEXT_IN | - | - |
| - | - | 13 | HEXT_OUT | O | - | HEXT_OUT | - | - |
| 5 | 5 | - | HEXT_IN / PD0 (8) | I/O | TC | HEXT_IN | - | PD0 (8) |
| 6 | 6 | - | HEXT_OUT / PD1 (8) | I/O | TC | HEXT_OUT | - | PD1 (8) |
| 7 | 7 | 14 | NRST | I/O | - | NRST | - | - |
| - | 8 | 15 | PC0 | I/O | FTa | PC0 | ADC123_IN10 / SDIO2_D0 (7) | - |
| - | 9 | 16 | PC1 | I/O | FTa | PC1 | ADC123_IN11 / SDIO2_D1 (7) | - |
| - | 10 | 17 | PC2 | I/O | FTa | PC2 | ADC123_IN12 / SDIO2_D2 (7) | UART8_TX / XMC_NWE |
| - | 11 | 18 | PC3 | I/O | FTa | PC3 | ADC123_IN13 / SDIO2_D3 (7) / XMC_A0 | UART8_RX |
| - | - | 19 | V SSA | S | - | V SSA | - | - |
| - | - | 20 | V REF- | S | - | V REF- | - | - |
| 8 | 12 | - | V SSA / V REF- | S | - | V SSA / V REF- | - | - |
| - | - | 21 | V REF+ | S | - | V REF+ | - | - |
| - | - | 22 | V DDA | S | - | V DDA | - | - |
| 9 | 13 | - | V DDA / V REF+ | S | - | V DDA / V REF+ | - | - |
Table 6. AT32F403A series pin definitions
| Pin number | Pin number | Pin number | (1) | (2) | Multi-functions (4) | Multi-functions (4) | ||
|---|---|---|---|---|---|---|---|---|
| LQFP48 QFN48 | LQFP64 | LQFP100 | Pin name | Type | IO level | Main function (3) | Default | Remap |
| 10 | 14 | 23 | PA0 / WKUP | I/O | TC | PA0 | ADC123_IN0 /WKUP / USART2_CTS (7) / TMR2_CH1 (7) / TMR2_EXT (7) / TMR5_CH1 / TMR8_EXT | UART4_TX |
| 11 | 15 | 24 | PA1 | I/O | FTa | PA1 | ADC123_IN1 / USART2_RTS (7) / TMR2_CH2 (7) / TMR5_CH2 | UART4_RX |
| 12 | 16 | 25 | PA2 | I/O | FTa | PA2 | ADC123_IN2 / USART2_TX (7) / TMR2_CH3 (7) / TMR5_CH3 / TMR9_CH1 (7) | SDIO2_CK / XMC_D4 |
| 13 | 17 | 26 | PA3 | I/O | FTa | PA3 | ADC123_IN3 / USART2_RX (7) / TMR2_CH4 (7) / TMR5_CH4 / TMR9_CH2 (7) | I2S2_MCK / SDIO2_CMD / XMC_D5 |
| - | 18 | 27 | V SS_4 | S | - | V SS_4 | - | - |
| - | 19 | 28 | V DD_4 | S | - | V DD_4 | - | - |
| 14 | 20 | 29 | PA4 | I/O | FTa | PA4 | DAC1_OUT / ADC12_IN4 / USART2_CK (7) / SPI1_CS (7) / I2S1_WS (7) / SDIO2_D4 | USART6_TX / SPI3_CS/ I2S3_WS / SDIO2_D0 / XMC_D6 |
| 15 | 21 | 30 | PA5 | I/O | FTa | PA5 | DAC2_OUT / ADC12_IN5 / SPI1_SCK (7) / I2S1_CK (7) / SDIO2_D5 | USART6_RX / SDIO2_D1 / XMC_D7 |
| 16 | 22 | 31 | PA6 | I/O | FTa | PA6 | ADC12_IN6 / SPI1_MISO (7) / SDIO2_D6 / TMR3_CH1 (7) / TMR8_BRK / TMR13_CH1 | I2S2_MCK / SDIO2_D2 / TMR1_BRK |
| 17 | 23 | 32 | PA7 | I/O | FTa | PA7 | ADC12_IN7 / SPI1_MOSI (7) / I2S1_SD (7) / SDIO2_D7 / TMR3_CH2 (7) / TMR8_CH1C / TMR14_CH1 | SDIO2_D3 / TMR1_CH1C |
| - | 24 | 33 | PC4 | I/O | FTa | PC4 | ADC12_IN14 / SDIO2_CK (7) / XMC_NE4 | - |
| - | 25 | 34 | PC5 | I/O | FTa | PC5 | ADC12_IN15 / SDIO2_CMD (7) | XMC_NOE |
| 18 | 26 | 35 | PB0 | I/O | FTa | PB0 | ADC12_IN8 / I2S1_MCK (7) / TMR3_CH3 (7) / TMR8_CH2C | TMR1_CH2C |
| 19 | 27 | 36 | PB1 | I/O | FTa | PB1 | ADC12_IN9 / SPIM_SCK / TMR3_CH4 (7) / TMR8_CH3C | TMR1_CH3C |
| 20 | 28 | 37 | PB2 | I/O | FT | PB2 / BOOT1 (9) | - | - |
| - | - | 38 | PE7 | I/O | FT | PE7 | UART7_RX (7) / XMC_D4 (7) | TMR1_EXT |
| - | - | 39 | PE8 | I/O | FT | PE8 | UART7_TX (7) / XMC_D5 (7) | TMR1_CH1C |
| - | - | 40 | PE9 | I/O | FT | PE9 | XMC_D6 (7) | TMR1_CH1 |
| - | - | 41 | PE10 | I/O | FT | PE10 | XMC_D7 (7) | TMR1_CH2C |
| - | - | 42 | PE11 | I/O | FT | PE11 | XMC_D8 | SPI4_SCK / I2S4_CK / TMR1_CH2 |
| - | - | 43 | PE12 | I/O | FT | PE12 | XMC_D9 | SPI4_CS / I2S4_WS / TMR1_CH3C |
| - | - | 44 | PE13 | I/O | FT | PE13 | XMC_D10 | SPI4_MISO / TMR1_CH3 |
| - | - | 45 | PE14 | I/O | FT | PE14 | XMC_D11 | SPI4_MOSI / I2S4_SD / TMR1_CH4 |
| - | - | 46 | PE15 | I/O | FT | PE15 | XMC_D12 | TMR1_BRK |
| Pin number | Pin number | Pin number | (1) | (2) | Multi-functions (4) | Multi-functions (4) | ||
| LQFP48 QFN48 | LQFP64 | LQFP100 | Pin name | Type | IO level | Main function (3) | Default | Remap |
| 21 | 29 | 47 | PB10 | I/O | FT | PB10 | USART3_TX (7) / I2C2_SCL | I2S3_MCK / SPIM_IO0 / TMR2_CH3 |
| 22 | 30 | 48 | PB11 | I/O | FT | PB11 | USART3_RX (7) / I2C2_SDA | SPIM_IO1 / TMR2_CH4 |
| 23 | 31 | 49 | V SS_1 | S | - | V SS_1 | - | - |
| 24 | 32 | 50 | V DD_1 | S | - | V DD_1 | - | - |
| 25 | 33 | 51 | PB12 | I/O | FT | PB12 | USART3_CK (7) / CAN2_RX (7) / I2C2_SMBA / SPI2_CS / I2S2_WS / TMR1_BRK (7) | XMC_D13 |
| 26 | 34 | 52 | PB13 | I/O | FT | PB13 | USART3_CTS (7) / CAN2_TX (7) / SPI2_SCK / I2S2_CK / TMR1_CH1C (7) | - |
| 27 | 35 | 53 | PB14 | I/O | FT | PB14 | USART3_RTS (7) / SPI2_MISO / I2S2_SDEXT / TMR1_CH2C (7) / TMR12_CH1 | XMC_D0 |
| 28 | 36 | 54 | PB15 | I/O | FT | PB15 | SPI2_MOSI / I2S2_SD / TMR1_CH3C (7) / TMR12_CH2 | - |
| - | - | 55 | PD8 | I/O | FT | PD8 | XMC_D13 (7) | USART3_TX |
| - | - | 56 | PD9 | I/O | FT | PD9 | XMC_D14 | USART3_RX |
| - | - | 57 | PD10 | I/O | FT | PD10 | XMC_D15 | USART3_CK |
| - | - | 58 | PD11 | I/O | FT | PD11 | XMC_A16 | USART3_CTS |
| - | - | 59 | PD12 | I/O | FT | PD12 | XMC_A17 | USART3_RTS / TMR4_CH1 |
| - | - | 60 | PD13 | I/O | FT | PD13 | XMC_A18 | TMR4_CH2 |
| - | - | 61 | PD14 | I/O | FT | PD14 | XMC_D0 (7) | TMR4_CH3 |
| - | - | 62 | PD15 | I/O | FT | PD15 | XMC_D1 (7) | TMR4_CH4 |
| - | 37 | 63 | PC6 | I/O | FT | PC6 | USART6_TX (7) / I2S2_MCK (7) / SDIO1_D6 / TMR8_CH1 | XMC_D1 / TMR3_CH1 |
| - | 38 | 64 | PC7 | I/O | FT | PC7 | USART6_RX (7) / I2S3_MCK (7) / SDIO1_D7 / TMR8_CH2 | TMR3_CH2 |
| - | 39 | 65 | PC8 | I/O | FT | PC8 | USART6_CK / I2S4_MCK (7) / SDIO1_D0 / TMR8_CH3 | TMR3_CH3 |
| - | 40 | 66 | PC9 | I/O | FT | PC9 | I2C3_SDA (7) / SDIO1_D1 / TMR8_CH4 | TMR3_CH4 |
| 29 | 41 | 67 | PA8 | I/O | FT | PA8 | CLKOUT / USART1_CK / I2C3_SCL / USBFS_SOF / SPIM_CS / TMR1_CH1 (7) | - |
| 30 | 42 | 68 | PA9 | I/O | FT | PA9 | USART1_TX (7) / I2C3_SMBA / TMR1_CH2 (7) | - |
| 31 | 43 | 69 | PA10 | I/O | FT | PA10 | USART1_RX (7) / TMR1_CH3 (7) | I2S4_MCK |
| 32 | 44 | 70 | PA11 | I/O | TC | PA11 | USBFS1_D- / USART1_CTS / CAN1_RX (7) / SPIM_IO0 (7) / TMR1_CH4 (7) | - |
| 33 | 45 | 71 | PA12 | I/O | TC | PA12 | USBFS1_D+ / USART1_RTS / CAN1_TX (7) / SPIM_IO1 (7) / TMR1_EXT (7) | - |
| 34 | 46 | 72 | PA13 | I/O | FT | JTMS- SWDIO | - | PA13 |
| Pin number | Pin number | Pin number | (1) | (2) | Multi-functions (4) | Multi-functions (4) | ||
| LQFP48 QFN48 | LQFP64 | LQFP100 | Pin name | Type | IO level | Main function (3) | Default | Remap |
| - - 73 Disconnected | - - 73 Disconnected | - - 73 Disconnected | - - 73 Disconnected | - - 73 Disconnected | - - 73 Disconnected | - - 73 Disconnected | - - 73 Disconnected | - - 73 Disconnected |
| 35 | 47 | 74 | V SS_2 | S | - | V SS_2 | - | - |
| 36 | 48 | 75 | V DD_2 | S | - | V DD_2 | - | - |
| 37 | 49 | 76 | PA14 | I/O | FT | JTCK- SWCLK | - | PA14 |
| 38 | 50 | 77 | PA15 | I/O | FT | JTDI | SPI3_CS (7) / I2S3_WS (7) | PA15 / SPI1_CS / I2S1_WS / TMR2_CH1 / TMR2_EXT |
| - | 51 | 78 | PC10 | I/O | FT | PC10 | UART4_TX (7) / SDIO1_D2 | USART3_TX / SPI3_SCK / I2S3_CK |
| - | 52 | 79 | PC11 | I/O | FT | PC11 | UART4_RX (7) / SDIO1_D3 | USART3_RX / SPI3_MISO / I2S3_SDEXT / XMC_D2 |
| - | 53 | 80 | PC12 | I/O | FT | PC12 | UART5_TX (7) / SDIO1_CK | USART3_CK / SPI3_MOSI / I2S3_SD / XMC_D3 |
| - | - | 81 | PD0 | I/O | FT | PD0 | XMC_D2 (7) | CAN1_RX |
| - | - | 82 | PD1 | I/O | FT | PD1 | XMC_D3 (7) | CAN1_TX |
| - | 54 | 83 | PD2 | I/O | FT | PD2 | UART5_RX (7) / SDIO1_CMD / TMR3_EXT | XMC_NWE |
| - | - | 84 | PD3 | I/O | FT | PD3 | XMC_CLK | USART2_CTS |
| - | - | 85 | PD4 | I/O | FT | PD4 | XMC_NOE (7) | USART2_RTS |
| - | - | 86 | PD5 | I/O | FT | PD5 | XMC_NWE (7) | USART2_TX |
| - | - | 87 | PD6 | I/O | FT | PD6 | XMC_NWAIT | USART2_RX |
| - | - | 88 | PD7 | I/O | FT | PD7 | XMC_NE1 / XMC_NCE2 | USART2_CK |
| 39 | 55 | 89 | PB3 | I/O | FT | JTDO | SPI3_SCK (7) / I2S3_CK (7) | PB3 / UART7_RX / SPI1_SCK / I2S1_CK / SWO / TMR2_CH2 |
| 40 | 56 | 90 | PB4 | I/O | FT | NJTRST | SPI3_MISO (7) / I2S3_SDEXT (7) | PB4 / SPI1_MISO / I2C3_SDA / UART7_TX / TMR3_CH1 |
| 41 | 57 | 91 | PB5 | I/O | FT | PB5 | SPI3_MOSI (7) / I2S3_SD (7) / I2C1_SMBA (7) | SPI1_MOSI / I2S1_SD / CAN2_RX / TMR3_CH2 |
| 42 | 58 | 92 | PB6 | I/O | FT | PB6 | I2C1_SCL (7) / SPIM_IO3 / TMR4_CH1 (7) | USART1_TX / I2S1_MCK / SPI4_CS / I2S4_WS / CAN2_TX |
| 43 | 59 | 93 | PB7 | I/O | FT | PB7 | I2C1_SDA (7) / XMC_NADV / SPIM_IO2 / TMR4_CH2 (7) | USART1_RX / SPI4_SCK / I2S4_CK |
| 44 | 60 | 94 | BOOT0 | I | - | BOOT0 | - | - |
| 45 | 61 | 95 | PB8 | I/O | FT | PB8 | SDIO1_D4 / TMR4_CH3 (7) / TMR10_CH1 | UART5_RX / SPI4_MISO / I2C1_SCL / CAN1_RX |
| 46 | 62 | 96 | PB9 | I/O | FT | PB9 | SDIO1_D5 / TMR4_CH4 (7) / TMR11_CH1 | UART5_TX / SPI4_MOSI / I2S4_SD / I2C1_SDA / CAN1_TX |
| - | - | 97 | PE0 | I/O | FT | PE0 | UART8_RX (7) / XMC_LB / TMR4_EXT | - |
| - | - | 98 | PE1 | I/O | FT | PE1 | UART8_TX (7) / XMC_UB | - |
| Pin number | Pin number | Pin number | Pin name | Type (1) | level (2) | Main function (3) | Multi-functions (4) | Multi-functions (4) |
| LQFP48 QFN48 | LQFP64 | LQFP100 | Pin name | Type (1) | level (2) | Main function (3) | Default | Remap |
| 47 | 63 | 99 | V SS_3 | S | - | V SS_3 | - | - |
| 48 | 64 | 100 | V DD_3 | S | - | V DD_3 | - | - |
| -/49 | - | - | EPAD | S | - | V SS | - | - |
- (2) TC = standard 3.3 V GPIO, FT = general 5 V-tolerant GPIO, FTa = 5 V-tolerant GPIO with analog functionalities. FTa pin is 5 V-tolerant when configured as input floating, input pull-up, or input pull-down mode. However, it cannot be 5 V-tolerant when configured as analog mode. Meanwhile, its input level should not higher than VDD + 0.3 V.
- (3) Function availability depends on the chosen device.
- (4) If several peripherals share the same GPIO pin, to avoid conflict between these multiple functions only one peripheral should be enabled at a time through the peripheral clock enable bit (in the corresponding CRM peripheral clock enable register).
- (5) PC13, PC14, and PC15 are supplied through the power switch. Since the switch only drives a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited not to be used as a current source (e.g. to drive an LED).
- (6) Main function after the first battery powered domain power-up. Later on, it depends on the contents of the battery powered registers even after reset (because these registers are not reset by the main reset). For details on how to manage these GPIOs, refer to the battery powered domain and register description sections in the AT32F403A reference manual.
- (7) This multiple function can be remapped by software to some other port pins (if available on the used package). For more details, refer to the multi-function GPIO and debug configuration section in the AT32F403A reference manual.
- (8) For the LQFP64, LQFP48, and QFN48 package, the pins number 5 and 6 are configured as HEXT_IN and HEXT_OUT after reset, the functionality of PD0 and PD1 can be remapped by software on these pins. However, for the LQFP100 package, PD0 and PD1 are available by default, so there is no need for remapping. For more details, refer to multi-function GPIO and debug configuration section in the AT32F403A reference manual.
- (9) If the device boots from Flash and leaves PB2 not used, suggest to pull PB2/BOOT1 pin down to VSS.
Electrical Characteristics
The definition and values of input AC characteristics are given as follows.
Table 36. Input AC characteristics
| Symbol | Parameter | Min | Max | Unit |
|---|---|---|---|---|
| t EXINTpw | Pulse width of external signals detected by EXINT controller | 10 | - | ns |
Table 36. Input AC characteristics
Thermal Information
Thermal characteristics are calculated based on two-layer board that uses FR-4 material of 1.6mm thickness. They are guaranteed by design, not tested in production.
Table 61. Package thermal characteristics
| Symbol | Parameter | Value | Unit |
|---|---|---|---|
| Θ JA | Thermal resistance junction-ambient LQFP100 - 14 × 14 mm/0.5mm pitch | 61.2 | ° C/W |
| Θ JA | Thermal resistance junction-ambient LQFP64 - 10 × 10 mm/0.5mm pitch | 64.6 | ° C/W |
| Θ JA | Thermal resistance junction-ambient LQFP48 - 7 × 7 mm/0.5mm pitch | 68.8 | ° C/W |
| Θ JA | Thermal resistance junction-ambient QFN48 - 6 × 6 mm/0.4mm pitch | 37.8 | ° C/W |
Table 61. Package thermal characteristics
Package Information
Figure 39. LQFP100 - 14 x 14 mm 100 pin low-profile quad flat package outline
Table 57. LQFP100 - 14 x 14 mm 100 pin low-profile quad flat package mechanical data
| Millimeters | Millimeters | Millimeters | |
|---|---|---|---|
| Symbol | Min | Typ | Max |
| A | - | - | 1.60 |
| A1 | 0.05 | - | 0.15 |
| A2 | 1.35 | 1.40 | 1.45 |
| b | 0.17 | 0.20 | 0.26 |
| c | 0.10 | 0.127 | 0.20 |
| D | 15.75 | 16.00 | 16.25 |
| D1 | 13.90 | 14.00 | 14.10 |
| E | 15.75 | 16.00 | 16.25 |
| E1 | 13.90 | 14.00 | 14.10 |
| e | 0.50 BSC. | 0.50 BSC. | 0.50 BSC. |
| L | 0.45 | 0.60 | 0.75 |
| L1 | 1.00 REF. | 1.00 REF. | 1.00 REF. |
Table 57. LQFP100 - 14 x 14 mm 100 pin low-profile quad flat package mechanical data
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| AT32F403ACCT7 | Artery Technology | — |
| AT32F403ACCU7 | Artery Technology | — |
| AT32F403ACET7 | Artery Technology | — |
| AT32F403ACEU7 | Artery Technology | — |
| AT32F403ACGT7 | Artery Technology | — |
| AT32F403ACGU7 | Artery Technology | — |
| AT32F403ARCT7 | Artery Technology | — |
| AT32F403ARET7 | Artery Technology | — |
| AT32F403ARGT7 | Artery Technology | — |
| AT32F403AVCT7 | Artery Technology | — |
| AT32F403AVET7 | Artery Technology | — |
| AT32F403AVGT7 | Artery Technology | — |
| AT32F403AXC | Artery Technology | — |
| AT32F403AXE | Artery Technology | — |
| AT32F403AXG | Artery Technology | — |
| AT32F403AXXT7 | Artery Technology | — |
| AT32F403AXXU7 | Artery Technology | — |
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