AK2404
The AK2404 is an electronic component from Asahi Kasei. View the full AK2404 datasheet below including key specifications, pinout.
Manufacturer
Asahi Kasei
Category
RF Receivers, Transceivers
Package
68-VFQFN Exposed Pad
Lifecycle
Active
Key Specifications
| Parameter | Value |
|---|---|
| Current - Receiving | 40mA ~ 109mA |
| Current - Receiving | 40mA ~ 109mA |
| Current - Transmitting | 9mA ~ 60mA |
| Current - Transmitting | 9mA ~ 60mA |
| Frequency | 45MHz ~ 960MHz |
| Modulation | 2-FSK, 4-FSK, 4-DQPSK, 16-QAM, FM, QPSK |
| Modulation | 2-FSK, 4-FSK, 4-DQPSK, 16-QAM, FM, QPSK |
| Mounting Type | Surface Mount |
| Operating Temperature | -40°C ~ 85°C |
| Package / Case | 68-VFQFN Exposed Pad |
| Power - Output | 2dBm |
| Power - Output | 2dBm |
| RF Family/Standard | General ISM < 1GHz |
| RF Family/Standard | General ISM < 1GHz |
| Serial Interfaces | ADC, SDI, SPI |
| Serial Interfaces | ADC, SDI, SPI |
| Supplier Device Package | 68-QFN (8x8) |
| Supplier Device Package | 68-QFN (8x8) |
| Type | TxRx Only |
| Type | TxRx Only |
| Supply Voltage | 2.7V ~ 3.45V |
Overview
The AK2404 is a direct conversion transceiver IC that realizes high-performance narrowband wireless communication. The receiver section incorporates an LNA, quadrature demodulator, PGA, 24bit ΔΣ A/D Converter, and digital filter to provide a receiver with high sensitivity and high interference immunity without the use of ceramic or SAW filter. In particular, the blocking characteristics of Δ 10MHz are over 100dB (Standard: TIA603, EN 300 0861-1). The digital filter with variable bandwidth supports channel selection for multiple different wireless systems, enabling easy system design in wireless platforms. In addition, a ΔΣ fractional N PLL synthesizer is incorporated to configure high -performance PLLs with an external VCO. The transmitter has a built-in DAC and driver amplifier. The compact QFN Package of 8mm square contributes to the miniaturization of radio equipment.
Features
-
◼ Features
-
Operating Frequency: 45MHz to 960MH
-
Power Supply: 2.7 to 3.45V (IOVDD: 1.7 to 1.9V also used 2.7 to 3.45V)
-
Operational Temperature: -40 to +85°C
-
LNA, Attenuator (ATT) and PDET for interference detection
-
Automatic PGA gain control function for high dynamic range
-
High Linearity Direct Conversion I/Q Demodulator
-
24-bit ΔΣ A/D Converter: up to 192kHz Output Sampling Rate (TCXO=24.576MHz)
-
Band Changeable Digital Filter (The FIR filter coefficients can be set arbitrarily)
-
RSSI Functions: Data read by SPI and Analog voltage output
-
FM Detection Circuit and Noise Squelch Function
-
Support Zero IF and Very Low IF architecture
-
DC Offset Cancelation: Real-time DC Offset Canceller (RDOC) Function and HPF
-
23- bit ΔΣ Fractional -N PLL Synthesizer
-
Modulation data input interface suitable for 2-point modulation for FM/FSK applications
-
12-bit D/A Converter: 96kHz Max. Sampling Rate, S/N 72dB
-
Transmission Drive Amplifier: -10 to +2dBm Output
-
Local Signal Dividing Circuit and Poly Phase Filter
-
TCXO Frequency: 18.432MHz / 19.2MHz / 24.576MHz recommended
-
Clock Rate Converter
-
Package: 68-pin QFN (8×8mm, 0.4 mm pitch)
-
◼ Applications
-
Narrow Band Radio Communications: 6.25kHz / 7.5kHz / 12.5kHz / 15kHz / 20kHz / 25kHz etc.
-
Modulation Method: FM / 2FSK/ 4FSK / QPSK / /4 DQPSK / 16QAM
(The demodulation needs to be externally executed except the FM modulation.)
-
Analog/Digital Dual Mode Transceiver
-
Digital Radio System for Industrial Use
-
Public Safety and Community/Emergence Radio System
-
Convenience Transceiver
-
Marine/Mobile Communication System
-
Low power / Telemeter Transmitter
-
Amateur Radio System
220900015-E-04 2023/04
Applications
-
◼ Features
-
Operating Frequency: 45MHz to 960MH
-
Power Supply: 2.7 to 3.45V (IOVDD: 1.7 to 1.9V also used 2.7 to 3.45V)
-
Operational Temperature: -40 to +85°C
-
LNA, Attenuator (ATT) and PDET for interference detection
-
Automatic PGA gain control function for high dynamic range
-
High Linearity Direct Conversion I/Q Demodulator
-
24-bit ΔΣ A/D Converter: up to 192kHz Output Sampling Rate (TCXO=24.576MHz)
-
Band Changeable Digital Filter (The FIR filter coefficients can be set arbitrarily)
-
RSSI Functions: Data read by SPI and Analog voltage output
-
FM Detection Circuit and Noise Squelch Function
-
Support Zero IF and Very Low IF architecture
-
DC Offset Cancelation: Real-time DC Offset Canceller (RDOC) Function and HPF
-
23- bit ΔΣ Fractional -N PLL Synthesizer
-
Modulation data input interface suitable for 2-point modulation for FM/FSK applications
-
12-bit D/A Converter: 96kHz Max. Sampling Rate, S/N 72dB
-
Transmission Drive Amplifier: -10 to +2dBm Output
-
Local Signal Dividing Circuit and Poly Phase Filter
-
TCXO Frequency: 18.432MHz / 19.2MHz / 24.576MHz recommended
-
Clock Rate Converter
-
Package: 68-pin QFN (8×8mm, 0.4 mm pitch)
-
◼ Applications
-
Narrow Band Radio Communications: 6.25kHz / 7.5kHz / 12.5kHz / 15kHz / 20kHz / 25kHz etc.
-
Modulation Method: FM / 2FSK/ 4FSK / QPSK / /4 DQPSK / 16QAM
(The demodulation needs to be externally executed except the FM modulation.)
-
Analog/Digital Dual Mode Transceiver
-
Digital Radio System for Industrial Use
-
Public Safety and Community/Emergence Radio System
-
Convenience Transceiver
-
Marine/Mobile Communication System
-
Low power / Telemeter Transmitter
-
Amateur Radio System
220900015-E-04 2023/04
Pin Configuration
AK2404 Pinout – 68-VFQFN Exposed Pad
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | DVDD | P | Digital Supply Voltage |
| 2 | LD | I | Load Signal |
| 3 | NSC1 | I | Noise Shaping Control 1 |
| 4 | NSC2 | I | Noise Shaping Control 2 |
| 5 | SDSCK | I | SDS Clock |
| 6 | MODSD | I | Modulator SD |
| 7 | MODFS | I | Modulator FS |
| 8 | DETOUT | O | Detector Output |
| 9 | MODUT | O | Modulator Output |
| 10 | DACVDD | P | DAC Supply Voltage |
| 11 | BMS2 | I | BMS2 Signal |
| 12 | VREF1 | P | Reference Voltage 1 |
| 13 | TCXON | I | TCXO Enable |
| 14 | INTLPD | I | Interpolation Low Pass Disable |
| 15 | VREF2 | I | Reference Voltage 2 |
| 16 | PLUVD | P | PLL UV Detect |
| 17 | PLLVSS | S | PLL Ground |
| 18 | CPVDD | P | Charge Pump Supply Voltage |
| 19 | CPOUT | O | Charge Pump Output |
| 20 | SWIN | I | Switch Input |
| 21 | CPZ | I | Charge Pump Zero |
| 22 | LOINP | I | LO Input Positive |
| 23 | LOINN | I | LO Input Negative |
| 24 | LODVDD | P | LO DAC Supply Voltage |
| 25 | TXOUTP | O | TX Output Positive |
| 26 | TXOUTN | O | TX Output Negative |
| 27 | LOVDD | P | LO Supply Voltage |
| 28 | MIXINP | I | Mixer Input Positive |
| 29 | MIXINN | I | Mixer Input Negative |
| 30 | MIXVDD | P | Mixer Supply Voltage |
| 31 | NC | – | No Connect |
| 32 | ATTOUT | O | Attenuator Output |
| 33 | RFSWIN | I | RF Switch Input |
| 34 | LNAOUT | O | LNA Output |
| 35 | VSS | S | Ground |
| 36 | LNAVDD | P | LNA Supply Voltage |
| 37 | LNAIN | I | LNA Input |
| 38 | LNACONT | O | LNA Control |
| 39 | NC | – | No Connect |
| 40 | ATTIN | I | Attenuator Input |
| 41 | PDETN | I | Positive Detector Negative |
| 42 | PDETN | I | Positive Detector Negative |
| 43 | MXOP | O | Mixer Output Positive |
| 44 | MXON | O | Mixer Output Negative |
| 45 | SWIP | I | Switch Input Positive |
| 46 | SWCP | I | Switch Control Positive |
| 47 | MXCOP | I | Mixer Control Positive |
| 48 | MXCOP | I | Mixer Control Positive |
| 49 | SWCN | I | Switch Control Negative |
| 50 | BYVDD | P | Bypass Supply Voltage |
| 51 | AAS1 | I | Analog Auxiliary Signal 1 |
| 52 | AOUTP | O | Analog Output Positive |
| 53 | AOUTN | O | Analog Output Negative |
| 54 | PDETOUT | O | Positive Detector Output |
| 55 | ADVSS | S | Analog Digital Ground |
| 56 | ADVDD | P | Analog Digital Supply Voltage |
| 57 | ADVCOM | I | Analog Digital Common |
| 58 | TEST1 | I | Test Pin 1 |
| 59 | RSTN | I | Reset Negative |
| 60 | CSN | I | Chip Select Negative |
| 61 | SDI | I | Serial Data Input |
| 62 | SCLK | I | Serial Clock |
| 63 | SDO | O | Serial Data Output |
| 64 | ADSDO | O | ADC Serial Data Output |
| 65 | STATUS | O | Status Output |
| 66 | ADSCLK | I | ADC Serial Clock |
| 67 | ADFS | I | ADC Frame Sync |
| 68 | DVSS | S | Digital Ground |
| EP | Exposed Pad | P | Thermal/Ground Pad |
Notes
- Pin 31 and 39 are marked NC (No Connect) in the diagram.
- Pins 41–42 and 47–48 appear to have duplicate names in the source diagram; verify actual function in detailed pin descriptions section of datasheet.
- The exposed pad (EP) on the back side should be connected to ground or thermal management as specified in the thermal design section.
- VSS (pins 17, 35, 55, 68) are ground connections; DVSS is digital ground, ADVSS is analog-digital ground, PLLVSS is PLL ground.
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