AD9361BBCZ-REEL

Part: AD9361 — Analog Devices

Type: RF Agile Transceiver

Description: A high performance, highly integrated RF Agile Transceiver designed for 3G and 4G base station applications, featuring 47 MHz to 6.0 GHz TX band, 70 MHz to 6.0 GHz RX band, and tunable channel bandwidth from <200 kHz to 56 MHz, with integrated 12-bit DACs and ADCs.

Operating Conditions:

• Supply voltages: VDD_GPO = 3.3 V, VDD_INTERFACE = 1.8 V, other VDDx = 1.3 V
• RX LO frequency: 70 MHz to 6.0 GHz
• TX LO frequency: 47 MHz to 6.0 GHz
• Tunable channel bandwidth: <200 kHz to 56 MHz

Key Specs:

• RX Center Frequency: 70 MHz to 6000 MHz
• TX Center Frequency: 46.875 MHz to 6000 MHz
• RX Noise Figure: 2 dB (at 800 MHz, Maximum RX gain)
• TX Modulation Accuracy (EVM): -40 dB (at 800 MHz, 19.2 MHz reference clock)
• LO Frequency Step: 2.4 Hz (at 2.4 GHz, 40 MHz reference clock)
• Auxiliary ADC Resolution: 12 Bits
• Auxiliary DAC Resolution: 10 Bits
• SPI_CLK Period: 20 ns (Min)

Features:

• RF 2 × 2 transceiver with integrated 12-bit DACs and ADCs
• TX band: 47 MHz to 6.0 GHz
• RX band: 70 MHz to 6.0 GHz
• Supports TDD and FDD operation
• Tunable channel bandwidth: <200 kHz to 56 MHz
• Dual receivers: 6 differential inputs
• Superior receiver sensitivity with a noise figure of 2 dB at 800 MHz LO
• RX gain control
• Real-time monitor and control signals for manual gain
• Independent automatic gain control
• Dual transmitters: 4 differential outputs
• Highly linear broadband transmitter
• TX EVM: ≤-40 dB
• TX noise: ≤-157 dBm/Hz noise floor
• TX monitor: ≥66 dB dynamic range with 1 dB accuracy
• Integrated fractional-N synthesizers
• 2.4 Hz maximum local oscillator (LO) step size
• Multichip synchronization
• CMOS/LVDS digital interface

Applications:

• Point to point communication systems
• Femtocell/picocell/microcell base stations
• General-purpose radio systems

Package:

• 144-ball chip scale package ball grid array (CSP_BGA)

• RF 2 × 2 transceiver with integrated 12-bit DACs and ADCs
• TX band: 47 MHz to 6.0 GHz
• RX band: 70 MHz to 6.0 GHz
• Supports TDD and FDD operation
• Tunable channel bandwidth: <200 kHz to 56 MHz
• Dual receivers: 6 differential inputs
• Superior receiver sensitivity with a noise figure of 2 dB at 800 MHz LO
• RX gain control
• Real-time monitor and control signals for manual gain
• Independent automatic gain control
• Dual transmitters: 4 differential outputs
• Highly linear broadband transmitter
• TX EVM: ≤-40 dB
• TX noise: ≤-157 dBm/Hz noise floor
• TX monitor: ≥66 dB dynamic range with 1 dB accuracy
• Integrated fractional-N synthesizers ► 2.4 Hz maximum local oscillator (LO) step size
• Multichip synchronization
• CMOS/LVDS digital interface

• Point to point communication systems
• Femtocell/picocell/microcell base stations
• General-purpose radio systems

• Parameter
• VDDx to VSSx
• VDD_INTERFACE to VSSx
• VDD_GPO to VSSx
• Logic Inputs and Outputs to VSSx
• Input Current to Any Pin Except Supplies
• RF Inputs (Peak Power)
• TX Monitor Input Power (Peak Power)
• Package Power Dissipation
• Maximum Junction Temperature
• (T JMAX ) Operating Temperature Range
• Storage Temperature Range

Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.

θ JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.