AD7793BRU

Sigma-Delta ADC

The AD7793BRU is a sigma-delta adc from Analog Devices. View the full AD7793BRU datasheet below including specifications and datasheet sections.

Manufacturer

Analog Devices

Overview

Part: AD7793 — Analog Devices

Type: 24-Bit Sigma-Delta ADC

Description: A low power, low noise, 24-bit Σ-Δ ADC with three differential analog inputs, an on-chip programmable gain instrumentation amplifier, and an internal band gap reference, operating from a 2.7 V to 5.25 V supply.

Operating Conditions:

Supply voltage: 2.7 V to 5.25 V
Operating temperature: -40°C to +105°C
Output update rate: 4.17 Hz to 470 Hz

Absolute Maximum Ratings:

Key Specs:

Effective Resolution: Up to 23 bits
RMS Noise: 40 nV @ 4.17 Hz (gain = 64)
Current Consumption: 400 μA typical
Power-Down Current: 1 μA maximum
Internal Reference Drift: 4 ppm/°C typical
Integral Nonlinearity: ±15 μV typ (Gain = 1 to 16, external reference)
Offset Error Drift vs. Temperature: ±10 nV/°C typ
Power Supply Rejection: 100 dB min

Features:

Low noise programmable gain instrumentation amp
Band gap reference with 4 ppm/°C drift typical
3 differential inputs
Internal clock oscillator
Simultaneous 50 Hz/60 Hz rejection
Programmable current sources
On-chip bias voltage generator
Burnout currents
Independent interface power supply
SPI®, QSPI™, MICROWIRE™, and DSP compatible interface
3-wire serial Schmitt trigger on SCLK

Applications:

Thermocouple measurements
RTD measurements
Thermistor measurements
Gas analysis
Industrial process control
Instrumentation
Portable instrumentation
Blood analysis
Smart transmitters
Liquid/gas chromatography
6-digit DVM

Package:

16-lead TSSOP

Features

Up to 23 bits effective resolution

RMS noise

40 nV @ 4.17 Hz

85 nV @ 16.7 Hz

Current: 400 μA typical

Power-down: 1 μA maximum

Low noise programmable gain instrumentation amp

Band gap reference with 4 ppm/°C drift typical

Update rate: 4.17 Hz to 470 Hz

3 differential inputs

Internal clock oscillator

Simultaneous 50 Hz/60 Hz rejection

Programmable current sources

On-chip bias voltage generator

Burnout currents

Power supply: 2.7 V to 5.25 V

-40°C to +105°C temperature range Independent interface power supply 16-lead TSSOP package

Interface

SPI®, QSPI™, MICROWIRE™, and DSP compatible

3-wire serial Schmitt trigger on SCLK

Applications

Thermocouple measurements RTD measurements Thermistor measurements Gas analysis Industrial process control Instrumentation Portable instrumentation Blood analysis Smart transmitters Liquid/gas chromatography 6-digit DVM

Pin Configuration

Figure 5. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.	Mnemonic	Description
1	SCLK	Serial Clock Input. This serial clock input is for data transfers to and from the ADC. The SCLK has a Schmitt- triggered input, making the interface suitable for opto-isolated applications. The serial clock can be continuous with all data transmitted in a continuous train of pulses. Alternatively, it can be a noncontinuous clock with the information being transmitted to or from the ADC in smaller batches of data.
2	CLK	Clock In/Clock Out.The internal clock can be made available at this pin. Alternatively, the internal clock can be disabled, and the ADC can be driven by an external clock. This allows several ADCs to be driven from a common clock, allowing simultaneous conversions to be performed.
3	CS	Chip Select Input. This is an active low logic input used to select the ADC. CS can be used to select the ADC in systemswithmorethan onedevice onthe serial bus or as a frame synchronization signal in communicating with the device. CS can be hardwired low, allowing the ADC to operate in 3-wire mode with SCLK, DIN, and DOUT used to interface with the device.
4	IOUT1	Output of Internal Excitation Current Source. The internal excitation current source can be made available at this pin. The excitation current source is programmable so that the current can be 10 μA, 210 μA, or 1 mA. Either IEXC1 or IEXC2 can be switched to this output.
5	AIN1(+)	Analog Input. AIN1(+) is the positive terminal of the differential analog input pair AIN1(+)/AIN1( - ).
6	AIN1( - )	Analog Input. AIN1( - ) is the negative terminal of the differential analog input pair AIN1(+)/AIN1( - ).
7	AIN2(+)	Analog Input. AIN2(+) is the positive terminal of the differential analog input pair AIN2(+)/AIN2( - ).
8	AIN2( - )	Analog Input. AIN2( - ) is the negative terminal of the differential analog input pair AIN2(+)/AIN2( - ).
9	REFIN(+)/AIN3(+)	Positive Reference Input/Analog Input. An external reference can be applied between REFIN(+) and REFIN( - ). REFIN(+) can lie anywhere between AV DD and GND+0.1V.The nominal reference voltage REFIN(+) - REFIN( - ) is 2.5 V, but the part functions with a reference from 0.1V to AV DD . Alternatively, this pin can function as AIN3(+) whereAIN3(+) is the positive terminal of the differential analog input pair AIN3(+)/AIN3( - ).
10	REFIN( - )/AIN3( - )	Negative Reference Input/Analog Input. REFIN( - ) is the negative reference input for REFIN. This reference input can lie anywhere between GNDand AV DD - 0.1 V. This pin also functions as AIN3( - ), which is the negative terminal of the differential analog input pair AIN3(+)/AIN3( - ).
11	IOUT2	Output of Internal Excitation Current Source. The internal excitation current source can be made available at this pin. The excitation current source is programmable so that the current can be 10 μA, 210 μA, or 1 mA. Either IEXC1 or IEXC2 can be switched to this output.
12	GND	Ground Reference Point.
13	AV DD	Supply Voltage, 2.7V to 5.25 V.
14	DV DD	Digital Interface Supply Voltage. The logic levels for the serial interface pins are related to this supply, which is between 2.7V and 5.25 V. The DV DD voltage is independent of the voltage on AV DD ; therefore, AV DD can equal 5V with DV DD at 3V or vice versa.

Pin No.	Mnemonic	Description
15	DOUT/RDY	Serial Data Output/Data Ready Output. DOUT/RDY serves a dual purpose. It functions as a serial data output pin to access the output shift register of the ADC. The output shift register can contain data from any of the on-chip data or control registers. In addition, DOUT/RDY operates as a data ready pin, going low to indicate the completion of a conversion. If the data is not read after the conversion, the pin goes high before the next update occurs. The DOUT/RDY falling edge can be used as an interrupt to a processor, indicating that valid data is available. With an external serial clock, the data can be read using the DOUT/RDY pin. With CS low, the data/control word information is placed on the DOUT/RDY pin on the SCLK falling edge and is valid on the SCLK rising edge.
16	DIN	Serial Data Input. This serial data input is to the input shift register on the ADC. Data in this shift register is transferred to the control registers within the ADC; the register selection bits of the communications register identify the appropriate register.

Related Variants

The following components are covered by the same datasheet.

Part Number	Manufacturer	Package
AD7792	Analog Devices	—
AD7793	Analog Devices	—
AD7793B	Analog Devices	—
AD7793BRU-REEL	Analog Devices	16-LeadTSSOP
AD7793BRUZ	Analog Devices	TSS
AD7793BRUZ-REEL	Analog Devices	16-LeadTSSOP
AD779X	Analog Devices	—

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